mikroSDK Reference Manual
a2fxxxm3_eth_driver.h
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1
31#ifndef _A2FXXXM3_ETH_DRIVER_H
32#define _A2FXXXM3_ETH_DRIVER_H
33
34//Dependencies
35#include "core/nic.h"
36
37//Number of TX buffers
38#ifndef A2FXXXM3_ETH_TX_BUFFER_COUNT
39 #define A2FXXXM3_ETH_TX_BUFFER_COUNT 2
40#elif (A2FXXXM3_ETH_TX_BUFFER_COUNT < 1)
41 #error A2FXXXM3_ETH_TX_BUFFER_COUNT parameter is not valid
42#endif
43
44//TX buffer size
45#ifndef A2FXXXM3_ETH_TX_BUFFER_SIZE
46 #define A2FXXXM3_ETH_TX_BUFFER_SIZE 1536
47#elif (A2FXXXM3_ETH_TX_BUFFER_SIZE != 1536)
48 #error A2FXXXM3_ETH_TX_BUFFER_SIZE parameter is not valid
49#endif
50
51//Number of RX buffers
52#ifndef A2FXXXM3_ETH_RX_BUFFER_COUNT
53 #define A2FXXXM3_ETH_RX_BUFFER_COUNT 4
54#elif (A2FXXXM3_ETH_RX_BUFFER_COUNT < 1)
55 #error A2FXXXM3_ETH_RX_BUFFER_COUNT parameter is not valid
56#endif
57
58//RX buffer size
59#ifndef A2FXXXM3_ETH_RX_BUFFER_SIZE
60 #define A2FXXXM3_ETH_RX_BUFFER_SIZE 1536
61#elif (A2FXXXM3_ETH_RX_BUFFER_SIZE != 1536)
62 #error A2FXXXM3_ETH_RX_BUFFER_SIZE parameter is not valid
63#endif
64
65//Interrupt priority grouping
66#ifndef A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING
67 #define A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING 2
68#elif (A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING < 0)
69 #error A2FXXXM3_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70#endif
71
72//Ethernet interrupt group priority
73#ifndef A2FXXXM3_ETH_IRQ_GROUP_PRIORITY
74 #define A2FXXXM3_ETH_IRQ_GROUP_PRIORITY 24
75#elif (A2FXXXM3_ETH_IRQ_GROUP_PRIORITY < 0)
76 #error A2FXXXM3_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77#endif
78
79//Ethernet interrupt subpriority
80#ifndef A2FXXXM3_ETH_IRQ_SUB_PRIORITY
81 #define A2FXXXM3_ETH_IRQ_SUB_PRIORITY 0
82#elif (A2FXXXM3_ETH_IRQ_SUB_PRIORITY < 0)
83 #error A2FXXXM3_ETH_IRQ_SUB_PRIORITY parameter is not valid
84#endif
85
86//MDEN bit definition
87#ifndef CSR9_MDEN_MASK
88 #define CSR9_MDEN_MASK CSR9_MII_MASK
89#endif
90
91//C++ guard
92#ifdef __cplusplus
93extern "C" {
94#endif
95
96
101typedef struct
102{
103 uint32_t tdes0;
104 uint32_t tdes1;
105 uint32_t tdes2;
106 uint32_t tdes3;
108
109
114typedef struct
115{
116 uint32_t rdes0;
117 uint32_t rdes1;
118 uint32_t rdes2;
119 uint32_t rdes3;
121
122
127typedef struct
128{
129 uint32_t hashFilter[32]; //0-127
130 uint32_t reserved1[7]; //128-155
131 uint32_t physicalAddr[3]; //156-167
132 uint32_t reserved2[6]; //168-191
134
135
136//A2FxxxM3 Ethernet MAC driver
137extern const NicDriver a2fxxxm3EthDriver;
138
139//A2FxxxM3 Ethernet MAC related functions
140error_t a2fxxxm3EthInit(NetInterface *interface);
141void a2fxxxm3EthInitDmaDesc(NetInterface *interface);
142
143void a2fxxxm3EthTick(NetInterface *interface);
144
145void a2fxxxm3EthEnableIrq(NetInterface *interface);
146void a2fxxxm3EthDisableIrq(NetInterface *interface);
147void a2fxxxm3EthEventHandler(NetInterface *interface);
148
149error_t a2fxxxm3EthSendSetup(NetInterface *interface);
150
151error_t a2fxxxm3EthSendPacket(NetInterface *interface,
152 const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
153
154error_t a2fxxxm3EthReceivePacket(NetInterface *interface);
155
156error_t a2fxxxm3EthUpdateMacAddrFilter(NetInterface *interface);
157error_t a2fxxxm3EthUpdateMacConfig(NetInterface *interface);
158
159void a2fxxxm3EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
160 uint8_t regAddr, uint16_t data);
161
162uint16_t a2fxxxm3EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
163 uint8_t regAddr);
164
165void a2fxxxm3EthWriteSmi(uint32_t data, uint_t length);
166uint32_t a2fxxxm3EthReadSmi(uint_t length);
167
168uint32_t a2fxxxm3EthCalcCrc(const void *data, size_t length);
169
170//C++ guard
171#ifdef __cplusplus
172}
173#endif
174
175#endif
error_t
Error codes.
Definition error.h:43
Network interface controller abstraction layer.
Hash table setup frame.
Definition a2fxxxm3_eth_driver.h:128
Receive DMA descriptor.
Definition a2fxxxm3_eth_driver.h:115
Transmit DMA descriptor.
Definition a2fxxxm3_eth_driver.h:102
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283