Macros
#define	ACCEL14_REG_PIN_CTRL 0x02

#define	ACCEL14_REG_FIFO_CTRL1 0x07

#define	ACCEL14_REG_FIFO_CTRL2 0x08

#define	ACCEL14_REG_FIFO_CTRL3 0x09

#define	ACCEL14_REG_FIFO_CTRL4 0x0A

#define	ACCEL14_REG_COUNTER_BDR_REG1 0x0B

#define	ACCEL14_REG_COUNTER_BDR_REG2 0x0C

#define	ACCEL14_REG_INT1_CTRL 0x0D

#define	ACCEL14_REG_INT2_CTRL 0x0E

#define	ACCEL14_REG_WHO_AM_I 0x0F

#define	ACCEL14_REG_CTRL1_XL 0x10

#define	ACCEL14_REG_CTRL3_C 0x12

#define	ACCEL14_REG_CTRL4_C 0x13

#define	ACCEL14_REG_CTRL5_C 0x14

#define	ACCEL14_REG_CTRL6_C 0x15

#define	ACCEL14_REG_CTRL7_C 0x16

#define	ACCEL14_REG_CTRL8_XL 0x17

#define	ACCEL14_REG_CTRL10_C 0x19

#define	ACCEL14_REG_ALL_INT_SRC 0x1A

#define	ACCEL14_REG_WAKE_UP_SRC 0x1B

#define	ACCEL14_REG_STATUS_REG 0x1E

#define	ACCEL14_REG_OUT_TEMP_L 0x20

#define	ACCEL14_REG_OUT_TEMP_H 0x21

#define	ACCEL14_REG_OUTX_L_A 0x28

#define	ACCEL14_REG_OUTX_H_A 0x29

#define	ACCEL14_REG_OUTY_L_A 0x2A

#define	ACCEL14_REG_OUTY_H_A 0x2B

#define	ACCEL14_REG_OUTZ_L_A 0x2C

#define	ACCEL14_REG_OUTZ_H_A 0x2D

#define	ACCEL14_REG_FIFO_STATUS1 0x3A

#define	ACCEL14_REG_FIFO_STATUS2 0x3B

#define	ACCEL14_REG_TIMESTAMP0 0x40

#define	ACCEL14_REG_TIMESTAMP1 0x41

#define	ACCEL14_REG_TIMESTAMP2 0x42

#define	ACCEL14_REG_TIMESTAMP3 0x43

#define	ACCEL14_REG_SLOPE_EN 0x56

#define	ACCEL14_REG_INTERRUPTS_EN 0x58

#define	ACCEL14_REG_WAKE_UP_THS 0x5B

#define	ACCEL14_REG_WAKE_UP_DUR 0x5C

#define	ACCEL14_REG_MD1_CFG 0x5E

#define	ACCEL14_REG_MD2_CFG 0x5F

#define	ACCEL14_REG_INTERNAL_FREQ_FINE 0x63

#define	ACCEL14_REG_X_OFS_USR 0x73

#define	ACCEL14_REG_Y_OFS_USR 0x74

#define	ACCEL14_REG_Z_OFS_USR 0x75

#define	ACCEL14_REG_FIFO_DATA_OUT_TAG 0x78

#define	ACCEL14_REG_FIFO_DATA_OUT_X_L 0x79

#define	ACCEL14_REG_FIFO_DATA_OUT_X_H 0x7A

#define	ACCEL14_REG_FIFO_DATA_OUT_Y_L 0x7B

#define	ACCEL14_REG_FIFO_DATA_OUT_Y_H 0x7C

#define	ACCEL14_REG_FIFO_DATA_OUT_Z_L 0x7D

#define	ACCEL14_REG_FIFO_DATA_OUT_Z_H 0x7E

Detailed Description

Macro Definition Documentation

◆ ACCEL14_REG_ALL_INT_SRC

#define ACCEL14_REG_ALL_INT_SRC 0x1A

◆ ACCEL14_REG_COUNTER_BDR_REG1

#define ACCEL14_REG_COUNTER_BDR_REG1 0x0B

◆ ACCEL14_REG_COUNTER_BDR_REG2

#define ACCEL14_REG_COUNTER_BDR_REG2 0x0C

◆ ACCEL14_REG_CTRL10_C

#define ACCEL14_REG_CTRL10_C 0x19

◆ ACCEL14_REG_CTRL1_XL

#define ACCEL14_REG_CTRL1_XL 0x10

◆ ACCEL14_REG_CTRL3_C

#define ACCEL14_REG_CTRL3_C 0x12

◆ ACCEL14_REG_CTRL4_C

#define ACCEL14_REG_CTRL4_C 0x13

◆ ACCEL14_REG_CTRL5_C

#define ACCEL14_REG_CTRL5_C 0x14

◆ ACCEL14_REG_CTRL6_C

#define ACCEL14_REG_CTRL6_C 0x15

◆ ACCEL14_REG_CTRL7_C

#define ACCEL14_REG_CTRL7_C 0x16

◆ ACCEL14_REG_CTRL8_XL

#define ACCEL14_REG_CTRL8_XL 0x17

◆ ACCEL14_REG_FIFO_CTRL1

#define ACCEL14_REG_FIFO_CTRL1 0x07

◆ ACCEL14_REG_FIFO_CTRL2

#define ACCEL14_REG_FIFO_CTRL2 0x08

◆ ACCEL14_REG_FIFO_CTRL3

#define ACCEL14_REG_FIFO_CTRL3 0x09

◆ ACCEL14_REG_FIFO_CTRL4

#define ACCEL14_REG_FIFO_CTRL4 0x0A

◆ ACCEL14_REG_FIFO_DATA_OUT_TAG

#define ACCEL14_REG_FIFO_DATA_OUT_TAG 0x78

◆ ACCEL14_REG_FIFO_DATA_OUT_X_H

#define ACCEL14_REG_FIFO_DATA_OUT_X_H 0x7A

◆ ACCEL14_REG_FIFO_DATA_OUT_X_L

#define ACCEL14_REG_FIFO_DATA_OUT_X_L 0x79

◆ ACCEL14_REG_FIFO_DATA_OUT_Y_H

#define ACCEL14_REG_FIFO_DATA_OUT_Y_H 0x7C

◆ ACCEL14_REG_FIFO_DATA_OUT_Y_L

#define ACCEL14_REG_FIFO_DATA_OUT_Y_L 0x7B

◆ ACCEL14_REG_FIFO_DATA_OUT_Z_H

#define ACCEL14_REG_FIFO_DATA_OUT_Z_H 0x7E

◆ ACCEL14_REG_FIFO_DATA_OUT_Z_L

#define ACCEL14_REG_FIFO_DATA_OUT_Z_L 0x7D

◆ ACCEL14_REG_FIFO_STATUS1

#define ACCEL14_REG_FIFO_STATUS1 0x3A

◆ ACCEL14_REG_FIFO_STATUS2

#define ACCEL14_REG_FIFO_STATUS2 0x3B

◆ ACCEL14_REG_INT1_CTRL

#define ACCEL14_REG_INT1_CTRL 0x0D

◆ ACCEL14_REG_INT2_CTRL

#define ACCEL14_REG_INT2_CTRL 0x0E

◆ ACCEL14_REG_INTERNAL_FREQ_FINE

#define ACCEL14_REG_INTERNAL_FREQ_FINE 0x63

◆ ACCEL14_REG_INTERRUPTS_EN

#define ACCEL14_REG_INTERRUPTS_EN 0x58

◆ ACCEL14_REG_MD1_CFG

#define ACCEL14_REG_MD1_CFG 0x5E

◆ ACCEL14_REG_MD2_CFG

#define ACCEL14_REG_MD2_CFG 0x5F

◆ ACCEL14_REG_OUT_TEMP_H

#define ACCEL14_REG_OUT_TEMP_H 0x21

◆ ACCEL14_REG_OUT_TEMP_L

#define ACCEL14_REG_OUT_TEMP_L 0x20

◆ ACCEL14_REG_OUTX_H_A

#define ACCEL14_REG_OUTX_H_A 0x29

◆ ACCEL14_REG_OUTX_L_A

#define ACCEL14_REG_OUTX_L_A 0x28

◆ ACCEL14_REG_OUTY_H_A

#define ACCEL14_REG_OUTY_H_A 0x2B

◆ ACCEL14_REG_OUTY_L_A

#define ACCEL14_REG_OUTY_L_A 0x2A

◆ ACCEL14_REG_OUTZ_H_A

#define ACCEL14_REG_OUTZ_H_A 0x2D

◆ ACCEL14_REG_OUTZ_L_A

#define ACCEL14_REG_OUTZ_L_A 0x2C

◆ ACCEL14_REG_PIN_CTRL

#define ACCEL14_REG_PIN_CTRL 0x02

◆ ACCEL14_REG_SLOPE_EN

#define ACCEL14_REG_SLOPE_EN 0x56

◆ ACCEL14_REG_STATUS_REG

#define ACCEL14_REG_STATUS_REG 0x1E

◆ ACCEL14_REG_TIMESTAMP0

#define ACCEL14_REG_TIMESTAMP0 0x40

◆ ACCEL14_REG_TIMESTAMP1

#define ACCEL14_REG_TIMESTAMP1 0x41

◆ ACCEL14_REG_TIMESTAMP2

#define ACCEL14_REG_TIMESTAMP2 0x42

◆ ACCEL14_REG_TIMESTAMP3

#define ACCEL14_REG_TIMESTAMP3 0x43

◆ ACCEL14_REG_WAKE_UP_DUR

#define ACCEL14_REG_WAKE_UP_DUR 0x5C

◆ ACCEL14_REG_WAKE_UP_SRC

#define ACCEL14_REG_WAKE_UP_SRC 0x1B

◆ ACCEL14_REG_WAKE_UP_THS

#define ACCEL14_REG_WAKE_UP_THS 0x5B

◆ ACCEL14_REG_WHO_AM_I

#define ACCEL14_REG_WHO_AM_I 0x0F

◆ ACCEL14_REG_X_OFS_USR

#define ACCEL14_REG_X_OFS_USR 0x73

◆ ACCEL14_REG_Y_OFS_USR

#define ACCEL14_REG_Y_OFS_USR 0x74

◆ ACCEL14_REG_Z_OFS_USR

#define ACCEL14_REG_Z_OFS_USR 0x75

Macros