accel18.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef ACCEL18_H
#define ACCEL18_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define ACCEL18_REG_DEVICE_STATUS                       0x05
#define ACCEL18_REG_INTERRUPT_ENABLE                    0x06
#define ACCEL18_REG_MODE                                0x07
#define ACCEL18_REG_SAMPLE_RATE                         0x08
#define ACCEL18_REG_MOTION_CONTROL                      0x09
#define ACCEL18_REG_FIFO_STATUS                         0x0A
#define ACCEL18_REG_FIFO_READ_POINTER                   0x0B
#define ACCEL18_REG_FIFO_WRITE_POINTER                  0x0C
#define ACCEL18_REG_XOUT_ACCEL_DATA_LSB                 0x0D
#define ACCEL18_REG_XOUT_ACCEL_DATA_MSB                 0x0E
#define ACCEL18_REG_YOUT_ACCEL_DATA_LSB                 0x0F
#define ACCEL18_REG_YOUT_ACCEL_DATA_MSB                 0x10
#define ACCEL18_REG_ZOUT_ACCEL_DATA_LSB                 0x11
#define ACCEL18_REG_ZOUT_ACCEL_DATA_MSB                 0x12
#define ACCEL18_REG_STATUS                              0x13
#define ACCEL18_REG_INTERRUPT_STATUS                    0x14
#define ACCEL18_REG_RANGE_SELECTION                     0x20
#define ACCEL18_REG_X_OFFSET_LSB                        0x21
#define ACCEL18_REG_X_OFFSET_MSB                        0x22
#define ACCEL18_REG_Y_OFFSET_LSB                        0x23
#define ACCEL18_REG_Y_OFFSET_MSB                        0x24
#define ACCEL18_REG_Z_OFFSET_LSB                        0x25
#define ACCEL18_REG_Z_OFFSET_MSB                        0x26
#define ACCEL18_REG_X_GAIN                              0x27
#define ACCEL18_REG_Y_GAIN                              0x28
#define ACCEL18_REG_Z_GAIN                              0x29
#define ACCEL18_REG_FIFO_CONTROL                        0x2D
#define ACCEL18_REG_FIFO_THRESHOLD                      0x2E
#define ACCEL18_REG_FIFO_INTERRUPT_STATUS               0x2F
#define ACCEL18_REG_FIFO_CONTROL2                       0x30
#define ACCEL18_REG_COMMUNICATION_CONTROL               0x31
#define ACCEL18_REG_GPIO_CONTROL                        0x33
#define ACCEL18_REG_TILT_FLIP_THRESHOLD_LSB             0x40
#define ACCEL18_REG_TILT_FLIP_THRESHOLD_MSB             0x41
#define ACCEL18_REG_TILT_FLIP_DEBOUNCE                  0x42
#define ACCEL18_REG_ANY_MOTION_THRESHOLD_LSB            0x43
#define ACCEL18_REG_ANY_MOTION_THRESHOLD_MSB            0x44
#define ACCEL18_REG_ANY_MOTION_DEBOUNCE                 0x45
#define ACCEL18_REG_SNAKE_THRESHOLD_LSB                 0x46
#define ACCEL18_REG_SNAKE_THRESHOLD_MSB                 0x47
#define ACCEL18_REG_PEAK_TO_PEAK_DURATION_LSB           0x48
#define ACCEL18_REG_SNAKE_PEAK_TO_PEAK_DURATION_MSB     0x49
#define ACCEL18_REG_TIMER                               0x4A
#define ACCEL18_REG_READ_COUNT                          0x4B
 
 
 // accel18_reg
 
#define ACCEL18_STATE_STANDBY                           0x00
#define ACCEL18_STATE_WAKE                              0x01
 
#define ACCEL18_INT_TILT_EN                             0x01
#define ACCEL18_INT_FLIP_EN                             0x02
#define ACCEL18_INT_ANYM_EN                             0x04
#define ACCEL18_INT_SHAKE_EN                            0x08
#define ACCEL18_INT_TILT_35_EN                          0x10
#define ACCEL18_INT_AUTO_CLR_EN                         0x40
#define ACCEL18_INT_ACQ_EN                              0x80
 
#define ACCEL18_RATE_25                                 0x10
#define ACCEL18_RATE_50                                 0x11
#define ACCEL18_RATE_62p5                               0x12
#define ACCEL18_RATE_100                                0x13
#define ACCEL18_RATE_125                                0x14
#define ACCEL18_RATE_250                                0x15
#define ACCEL18_RATE_500                                0x16
#define ACCEL18_RATE_1000                               0x17
 
#define ACCEL18_FIFO_CTRL2_BURST_MODE                   0x80
#define ACCEL18_FIFO_CTRL2_SELECT_WRAP_ADDR             0x20
#define ACCEL18_FIFO_CTRL2_ENABLE_WRAP_N                0x10
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DISABLE        0x00
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_2          0x01
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_4          0x02
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_5          0x03
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_8          0x04
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_10         0x05
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_16         0x06
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_20         0x07
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_40         0x08
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_67         0x09
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_80         0x0A
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_100        0x0B
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_200        0x0C
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_250        0x0D
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_500        0x0E
#define ACCEL18_FIFO_CTRL2_DEC_MODE_RATE_DIV_1000       0x0F
 
#define ACCEL18_GPIO_CTRL_INT1_ACTIVE_LOW               0x00
#define ACCEL18_GPIO_CTRL_INT1_ACTIVE_HIGH              0x04
#define ACCEL18_GPIO_CTRL_INT1_OPEN_DRAIN               0x00
#define ACCEL18_GPIO_CTRL_INT1_PUSH_PULL                0x08
#define ACCEL18_GPIO_CTRL_INT2_ACTIVE_LOW               0x00
#define ACCEL18_GPIO_CTRL_INT2_ACTIVE_HIGH              0x40
#define ACCEL18_GPIO_CTRL_INT2_OPEN_DRAIN               0x00
#define ACCEL18_GPIO_CTRL_INT2_PUSH_PULL                0x80
 
#define ACCEL18_MOTION_TF_EN                            0x01
#define ACCEL18_MOTION_LATCH                            0x02
#define ACCEL18_MOTION_ANYM_EN                          0x04
#define ACCEL18_MOTION_SHAKE_EN                         0x08
#define ACCEL18_MOTION_TILT_35                          0x10
#define ACCEL18_MOTION_Z_AXIS_ORT                       0x20
#define ACCEL18_MOTION_RAW_PROC_STAT                    0x40
#define ACCEL18_MOTION_RESET                            0x80
 
#define ACCEL18_STATUS_TILT                             0x01
#define ACCEL18_STATUS_FLIP                             0x02
#define ACCEL18_STATUS_ANYM                             0x04
#define ACCEL18_STATUS_SHAKE                            0x08
#define ACCEL18_STATUS_TILT35                           0x10
#define ACCEL18_STATUS_FIFO                             0x20
#define ACCEL18_STATUS_NEW_DATA                         0x80
 
#define ACCEL18_RANGE_2G                                0x00
#define ACCEL18_RANGE_4G                                0x10
#define ACCEL18_RANGE_8G                                0x20
#define ACCEL18_RANGE_16G                               0x30
#define ACCEL18_RANGE_12G                               0x40
#define ACCEL18_LOW_PASS_FILTER_EN                      0x08
#define ACCEL18_LOW_PASS_FILTER_DIV4p255                0x01
#define ACCEL18_LOW_PASS_FILTER_DIV6                    0x02
#define ACCEL18_LOW_PASS_FILTER_DIV12                   0x03
#define ACCEL18_LOW_PASS_FILTER_DIV16                   0x05
 
#define ACCEL18_GND_ADDR                                0x4C
#define ACCEL18_VCC_ADDR                                0x6C
#define ACCEL18_SET_DEV_ADDR                            ACCEL18_GND_ADDR
 
#define ACCEL18_SET_DATA_SAMPLE_EDGE                    SET_SPI_DATA_SAMPLE_EDGE
#define ACCEL18_SET_DATA_SAMPLE_MIDDLE                  SET_SPI_DATA_SAMPLE_MIDDLE
 
 // accel18_set
 
#define ACCEL18_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl  = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda  = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.i1 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.i2 = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // accel18_map
 // accel18
 
typedef enum
{
    ACCEL18_DRV_SEL_SPI,      
    ACCEL18_DRV_SEL_I2C       
} accel18_drv_t;
 
typedef err_t ( *accel18_master_io_t )( struct accel18_s*, uint8_t, uint8_t*, uint8_t ); 
typedef struct accel18_s
{
    digital_in_t  i1;               
    digital_in_t  i2;               
    i2c_master_t  i2c;              
    spi_master_t  spi;              
    uint8_t     slave_address;      
    pin_name_t  chip_select;        
    accel18_drv_t  drv_sel;         
    accel18_master_io_t  write_f;   
    accel18_master_io_t  read_f;    
    float range_resolution;         
} accel18_t;
 
typedef struct
{
    pin_name_t  scl;       
    pin_name_t  sda;       
    pin_name_t  miso;      
    pin_name_t  mosi;      
    pin_name_t  sck;       
    pin_name_t  cs;        
    pin_name_t  i1;        
    pin_name_t  i2;        
    uint32_t  i2c_speed;   
    uint8_t   i2c_address; 
    uint32_t                           spi_speed;       
    spi_master_mode_t                  spi_mode;        
    spi_master_chip_select_polarity_t  cs_polarity;     
    accel18_drv_t  drv_sel; 
} accel18_cfg_t;
 
typedef struct
{
    float x; 
    float y; 
    float z; 
} accel18_axes_t;
 
typedef enum
{
    ACCEL18_OK = 0,
    ACCEL18_ERROR = -1
 
} accel18_return_value_t;
 
void accel18_cfg_setup ( accel18_cfg_t *cfg );
 
void accel18_drv_interface_selection ( accel18_cfg_t *cfg, accel18_drv_t drv_sel );
 
err_t accel18_init ( accel18_t *ctx, accel18_cfg_t *cfg );
 
err_t accel18_default_cfg ( accel18_t *ctx );
 
err_t accel18_generic_write ( accel18_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
 
err_t accel18_byte_write ( accel18_t *ctx, uint8_t reg, uint8_t data_in );
 
err_t accel18_generic_read ( accel18_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
 
err_t accel18_byte_read ( accel18_t *ctx, uint8_t reg, uint8_t *data_out );
 
err_t accel18_read_axes ( accel18_t *ctx, accel18_axes_t *axes_data );
 
err_t accel18_set_range ( accel18_t *ctx, uint8_t range_macro );
 
uint8_t accel18_get_interrupt_1 ( accel18_t *ctx );
 
uint8_t accel18_get_interrupt_2 ( accel18_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // ACCEL18_H
 
 // accel18
 
// ------------------------------------------------------------------------ END