accel19 2.0.0.0
Macros
Accel 19 Registers Settings
Accel 19 Click Driver

Settings for registers of Accel 19 Click driver. More...

Macros

#define ACCEL19_DEVICE_ID   0x44
 Accel 19 description setting.
 
#define ACCEL19_CTRL1_ODR_BIT_MASK   0xF0
 Accel 19 Power mode and data rate configuration setting.
 
#define ACCEL19_CTRL1_ODR_POWER_DOWN   0x00
 
#define ACCEL19_CTRL1_ODR_LP_1_6_Hz   0x10
 
#define ACCEL19_CTRL1_ODR_HP_12_5_Hz   0x10
 
#define ACCEL19_CTRL1_ODR_HP_LP_12_5_Hz   0x20
 
#define ACCEL19_CTRL1_ODR_HP_LP_25_Hz   0x30
 
#define ACCEL19_CTRL1_ODR_HP_LP_50_Hz   0x40
 
#define ACCEL19_CTRL1_ODR_HP_LP_100_Hz   0x50
 
#define ACCEL19_CTRL1_ODR_HP_LP_200_Hz   0x60
 
#define ACCEL19_CTRL1_ODR_LP_200_Hz   0x70
 
#define ACCEL19_CTRL1_ODR_HP_400_Hz   0x70
 
#define ACCEL19_CTRL1_ODR_HP_800_Hz   0x80
 
#define ACCEL19_CTRL1_ODR_HP_1600_Hz   0x90
 
#define ACCEL19_CTRL1_OP_MODE_BIT_MASK   0x0C
 Accel 19 Mode selection setting.
 
#define ACCEL19_CTRL1_OP_MODE_LOW_POWER_MODE   0x00
 
#define ACCEL19_CTRL1_OP_MODE_HIGH_POWER_MODE   0x04
 
#define ACCEL19_CTRL1_OP_MODE_SINGLE_DATA_CONV   0x08
 
#define ACCEL19_CTRL1_LP_MODE_BIT_MASK   0x03
 Accel 19 Low-power mode setting.
 
#define ACCEL19_CTRL1_LP_MODE1_RES_12_bit   0x00
 
#define ACCEL19_CTRL1_LP_MODE2_RES_14_bit   0x01
 
#define ACCEL19_CTRL1_LP_MODE3_RES_14_bit   0x02
 
#define ACCEL19_CTRL1_LP_MODE4_RES_14_bit   0x03
 
#define ACCEL19_CTRL2_SOFT_RESET   0x40
 Accel 19 Soft reset data.
 
#define ACCEL19_INT_DRDY   0x00
 Accel 19 data ready.
 
#define ACCEL19_STATUS_DRDY   0x01
 
#define ACCEL19_CTRL6_BW_FILT_BIT_MASK   0xC0
 Accel 19 Bandwidth selection setting.
 
#define ACCEL19_CTRL6_BW_FILT_ODR_2   0x00
 
#define ACCEL19_CTRL6_BW_FILT_ODR_4   0x40
 
#define ACCEL19_CTRL6_BW_FILT_ODR_10   0x80
 
#define ACCEL19_CTRL6_BW_FILT_ODR_20   0xC0
 
#define ACCEL19_CTRL6_FS_BIT_MASK   0x30
 Accel 19 FS selection setting.
 
#define ACCEL19_CTRL6_FS_2g   0x00
 
#define ACCEL19_CTRL6_FS_4g   0x10
 
#define ACCEL19_CTRL6_FS_8g   0x20
 
#define ACCEL19_CTRL6_FS_16g   0x30
 
#define ACCEL19_SET_DEV_ADDR_0   0x18
 Accel 19 device address setting.
 
#define ACCEL19_SET_DEV_ADDR_1   0x19
 
#define ACCEL19_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection.
 
#define ACCEL19_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 

Detailed Description

Settings for registers of Accel 19 Click driver.

Macro Definition Documentation

◆ ACCEL19_CTRL1_LP_MODE1_RES_12_bit

#define ACCEL19_CTRL1_LP_MODE1_RES_12_bit   0x00

◆ ACCEL19_CTRL1_LP_MODE2_RES_14_bit

#define ACCEL19_CTRL1_LP_MODE2_RES_14_bit   0x01

◆ ACCEL19_CTRL1_LP_MODE3_RES_14_bit

#define ACCEL19_CTRL1_LP_MODE3_RES_14_bit   0x02

◆ ACCEL19_CTRL1_LP_MODE4_RES_14_bit

#define ACCEL19_CTRL1_LP_MODE4_RES_14_bit   0x03

◆ ACCEL19_CTRL1_LP_MODE_BIT_MASK

#define ACCEL19_CTRL1_LP_MODE_BIT_MASK   0x03

Accel 19 Low-power mode setting.

Specified low-power mode setting for description of Accel 19 Click driver.

◆ ACCEL19_CTRL1_ODR_BIT_MASK

#define ACCEL19_CTRL1_ODR_BIT_MASK   0xF0

Accel 19 Power mode and data rate configuration setting.

Specified power mode and data rate configuration setting for description of Accel 19 Click driver.

◆ ACCEL19_CTRL1_ODR_HP_12_5_Hz

#define ACCEL19_CTRL1_ODR_HP_12_5_Hz   0x10

◆ ACCEL19_CTRL1_ODR_HP_1600_Hz

#define ACCEL19_CTRL1_ODR_HP_1600_Hz   0x90

◆ ACCEL19_CTRL1_ODR_HP_400_Hz

#define ACCEL19_CTRL1_ODR_HP_400_Hz   0x70

◆ ACCEL19_CTRL1_ODR_HP_800_Hz

#define ACCEL19_CTRL1_ODR_HP_800_Hz   0x80

◆ ACCEL19_CTRL1_ODR_HP_LP_100_Hz

#define ACCEL19_CTRL1_ODR_HP_LP_100_Hz   0x50

◆ ACCEL19_CTRL1_ODR_HP_LP_12_5_Hz

#define ACCEL19_CTRL1_ODR_HP_LP_12_5_Hz   0x20

◆ ACCEL19_CTRL1_ODR_HP_LP_200_Hz

#define ACCEL19_CTRL1_ODR_HP_LP_200_Hz   0x60

◆ ACCEL19_CTRL1_ODR_HP_LP_25_Hz

#define ACCEL19_CTRL1_ODR_HP_LP_25_Hz   0x30

◆ ACCEL19_CTRL1_ODR_HP_LP_50_Hz

#define ACCEL19_CTRL1_ODR_HP_LP_50_Hz   0x40

◆ ACCEL19_CTRL1_ODR_LP_1_6_Hz

#define ACCEL19_CTRL1_ODR_LP_1_6_Hz   0x10

◆ ACCEL19_CTRL1_ODR_LP_200_Hz

#define ACCEL19_CTRL1_ODR_LP_200_Hz   0x70

◆ ACCEL19_CTRL1_ODR_POWER_DOWN

#define ACCEL19_CTRL1_ODR_POWER_DOWN   0x00

◆ ACCEL19_CTRL1_OP_MODE_BIT_MASK

#define ACCEL19_CTRL1_OP_MODE_BIT_MASK   0x0C

Accel 19 Mode selection setting.

Specified mode selection setting for description of Accel 19 Click driver.

◆ ACCEL19_CTRL1_OP_MODE_HIGH_POWER_MODE

#define ACCEL19_CTRL1_OP_MODE_HIGH_POWER_MODE   0x04

◆ ACCEL19_CTRL1_OP_MODE_LOW_POWER_MODE

#define ACCEL19_CTRL1_OP_MODE_LOW_POWER_MODE   0x00

◆ ACCEL19_CTRL1_OP_MODE_SINGLE_DATA_CONV

#define ACCEL19_CTRL1_OP_MODE_SINGLE_DATA_CONV   0x08

◆ ACCEL19_CTRL2_SOFT_RESET

#define ACCEL19_CTRL2_SOFT_RESET   0x40

Accel 19 Soft reset data.

Specified soft reset data for description of Accel 19 Click driver.

◆ ACCEL19_CTRL6_BW_FILT_BIT_MASK

#define ACCEL19_CTRL6_BW_FILT_BIT_MASK   0xC0

Accel 19 Bandwidth selection setting.

Specified Bandwidth selection setting for description of Accel 19 Click driver.

◆ ACCEL19_CTRL6_BW_FILT_ODR_10

#define ACCEL19_CTRL6_BW_FILT_ODR_10   0x80

◆ ACCEL19_CTRL6_BW_FILT_ODR_2

#define ACCEL19_CTRL6_BW_FILT_ODR_2   0x00

◆ ACCEL19_CTRL6_BW_FILT_ODR_20

#define ACCEL19_CTRL6_BW_FILT_ODR_20   0xC0

◆ ACCEL19_CTRL6_BW_FILT_ODR_4

#define ACCEL19_CTRL6_BW_FILT_ODR_4   0x40

◆ ACCEL19_CTRL6_FS_16g

#define ACCEL19_CTRL6_FS_16g   0x30

◆ ACCEL19_CTRL6_FS_2g

#define ACCEL19_CTRL6_FS_2g   0x00

◆ ACCEL19_CTRL6_FS_4g

#define ACCEL19_CTRL6_FS_4g   0x10

◆ ACCEL19_CTRL6_FS_8g

#define ACCEL19_CTRL6_FS_8g   0x20

◆ ACCEL19_CTRL6_FS_BIT_MASK

#define ACCEL19_CTRL6_FS_BIT_MASK   0x30

Accel 19 FS selection setting.

Specified FS selection setting for description of Accel 19 Click driver.

◆ ACCEL19_DEVICE_ID

#define ACCEL19_DEVICE_ID   0x44

Accel 19 description setting.

Specified setting for description of Accel 19 Click driver.

◆ ACCEL19_INT_DRDY

#define ACCEL19_INT_DRDY   0x00

Accel 19 data ready.

Specified data ready for description of Accel 19 Click driver.

◆ ACCEL19_SET_DATA_SAMPLE_EDGE

#define ACCEL19_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note
Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with accel19_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ ACCEL19_SET_DATA_SAMPLE_MIDDLE

#define ACCEL19_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

◆ ACCEL19_SET_DEV_ADDR_0

#define ACCEL19_SET_DEV_ADDR_0   0x18

Accel 19 device address setting.

Specified setting for device slave address selection of Accel 19 Click driver.

◆ ACCEL19_SET_DEV_ADDR_1

#define ACCEL19_SET_DEV_ADDR_1   0x19

◆ ACCEL19_STATUS_DRDY

#define ACCEL19_STATUS_DRDY   0x01