Accel 25 Registers Settings

Settings for registers of Accel 25 Click driver. More...

Macros
#define	ACCEL25_INT_SRC0_CHORZ   0x80
	Accel 25 description setting.
#define	ACCEL25_INT_SRC0_CHORXY   0x40
#define	ACCEL25_INT_SRC0_SHYM   0x08
#define	ACCEL25_INT_SRC0_SHYP   0x04
#define	ACCEL25_INT_SRC0_SHXM   0x02
#define	ACCEL25_INT_SRC0_SHXP   0x01
#define	ACCEL25_INT_CLR0_ORZC   0x80
	Accel 25 INT_CLR0 register settings.
#define	ACCEL25_INT_CLR0_ORXYC   0x40
#define	ACCEL25_INT_CLR0_SHYMC   0x08
#define	ACCEL25_INT_CLR0_SHYPC   0x04
#define	ACCEL25_INT_CLR0_SHXMC   0x02
#define	ACCEL25_INT_CLR0_SHXPC   0x01
#define	ACCEL25_INT_CLR0_ALL   0xCF
#define	ACCEL25_INT_SRC1_TILT   0x80
	Accel 25 INT_SRC1 register settings.
#define	ACCEL25_INT_SRC1_ORZ   0x40
#define	ACCEL25_INT_SRC1_ORXY_X_PLUS   0x00
#define	ACCEL25_INT_SRC1_ORXY_Y_PLUS   0x10
#define	ACCEL25_INT_SRC1_ORXY_X_MINUS   0x20
#define	ACCEL25_INT_SRC1_ORXY_Y_MINUS   0x30
#define	ACCEL25_INT_SRC1_ORXY_MASK   0x30
#define	ACCEL25_INT_SRC1_DRDY   0x01
#define	ACCEL25_INT_CLR1_SW_RST   0x10
	Accel 25 INT_CLR1 register settings.
#define	ACCEL25_INT_CLR1_DRDYC   0x01
#define	ACCEL25_STATUS_ORD   0x10
	Accel 25 STATUS register settings.
#define	ACCEL25_STATUS_ORIZ_MSB   0x08
#define	ACCEL25_STATUS_ORIZ_LSB   0x04
#define	ACCEL25_STATUS_ORIXY_MSB   0x02
#define	ACCEL25_STATUS_ORIXY_LSB   0x01
#define	ACCEL25_INT_MASK0_ORZE   0x80
	Accel 25 INT_MASK0 register settings.
#define	ACCEL25_INT_MASK0_ORXYE   0x40
#define	ACCEL25_INT_MASK0_SHYME   0x08
#define	ACCEL25_INT_MASK0_SHYPE   0x04
#define	ACCEL25_INT_MASK0_SHXME   0x02
#define	ACCEL25_INT_MASK0_SHXPE   0x01
#define	ACCEL25_INT_MASK0_NONE   0x00
#define	ACCEL25_INT_MASK0_ALL   0xCF
#define	ACCEL25_INT_MASK1_DRDYE   0x01
	Accel 25 INT_MASK1 register settings.
#define	ACCEL25_DETECTION_SHM   0x80
	Accel 25 DETECTION register settings.
#define	ACCEL25_DETECTION_SHTH_0p25G   0x00
#define	ACCEL25_DETECTION_SHTH_0p5G   0x10
#define	ACCEL25_DETECTION_SHTH_0p75G   0x20
#define	ACCEL25_DETECTION_SHTH_1G   0x30
#define	ACCEL25_DETECTION_SHTH_1p25G   0x40
#define	ACCEL25_DETECTION_SHTH_1p5G   0x50
#define	ACCEL25_DETECTION_SHTH_1p75G   0x60
#define	ACCEL25_DETECTION_SHTH_2G   0x70
#define	ACCEL25_DETECTION_SHTH_MASK   0x70
#define	ACCEL25_DETECTION_SHC_8   0x00
#define	ACCEL25_DETECTION_SHC_16   0x04
#define	ACCEL25_DETECTION_SHC_32   0x08
#define	ACCEL25_DETECTION_SHC_64   0x0C
#define	ACCEL25_DETECTION_SHC_MASK   0x0C
#define	ACCEL25_DETECTION_ORC_16   0x00
#define	ACCEL25_DETECTION_ORC_32   0x01
#define	ACCEL25_DETECTION_ORC_64   0x02
#define	ACCEL25_DETECTION_ORC_128   0x03
#define	ACCEL25_DETECTION_ORC_MASK   0x03
#define	ACCEL25_DETECTION_NONE   0x00
#define	ACCEL25_CONTROL_FSR_2G   0x00
	Accel 25 CONTROL register settings.
#define	ACCEL25_CONTROL_FSR_4G   0x20
#define	ACCEL25_CONTROL_FSR_8G   0x40
#define	ACCEL25_CONTROL_FSR_UNDEFINED   0x60
#define	ACCEL25_CONTROL_FSR_MASK   0x60
#define	ACCEL25_CONTROL_PD   0x01
#define	ACCEL25_ACCEL_RESOLUTION   2048.0f
	Accel 25 measurement calculation settings.
#define	ACCEL25_TEMP_SENSITIVITY   0.586f
#define	ACCEL25_TEMP_NOMINAL   25.0f
#define	ACCEL25_FSR_2G   0
	Accel 25 FSR settings.
#define	ACCEL25_FSR_4G   1
#define	ACCEL25_FSR_8G   2
#define	ACCEL25_DEVICE_ID   0x02
	Accel 25 Device ID register value.
#define	ACCEL25_PIN_STATE_LOW   0x00
	Accel 25 pin state value.
#define	ACCEL25_PIN_STATE_HIGH   0x01
#define	ACCEL25_DEVICE_ADDRESS   0x15
	Accel 25 device address setting.

Detailed Description

Settings for registers of Accel 25 Click driver.

Macro Definition Documentation

ACCEL25_ACCEL_RESOLUTION

#define ACCEL25_ACCEL_RESOLUTION   2048.0f

Accel 25 measurement calculation settings.

Specified settings for measurement calculation of Accel 25 Click driver.

ACCEL25_CONTROL_FSR_2G

#define ACCEL25_CONTROL_FSR_2G   0x00

Accel 25 CONTROL register settings.

Specified settings for CONTROL register of Accel 25 Click driver.

ACCEL25_CONTROL_FSR_4G

#define ACCEL25_CONTROL_FSR_4G   0x20

ACCEL25_CONTROL_FSR_8G

#define ACCEL25_CONTROL_FSR_8G   0x40

ACCEL25_CONTROL_FSR_MASK

#define ACCEL25_CONTROL_FSR_MASK   0x60

ACCEL25_CONTROL_FSR_UNDEFINED

#define ACCEL25_CONTROL_FSR_UNDEFINED   0x60

ACCEL25_CONTROL_PD

#define ACCEL25_CONTROL_PD   0x01

ACCEL25_DETECTION_NONE

#define ACCEL25_DETECTION_NONE   0x00

ACCEL25_DETECTION_ORC_128

#define ACCEL25_DETECTION_ORC_128   0x03

ACCEL25_DETECTION_ORC_16

#define ACCEL25_DETECTION_ORC_16   0x00

ACCEL25_DETECTION_ORC_32

#define ACCEL25_DETECTION_ORC_32   0x01

ACCEL25_DETECTION_ORC_64

#define ACCEL25_DETECTION_ORC_64   0x02

ACCEL25_DETECTION_ORC_MASK

#define ACCEL25_DETECTION_ORC_MASK   0x03

ACCEL25_DETECTION_SHC_16

#define ACCEL25_DETECTION_SHC_16   0x04

ACCEL25_DETECTION_SHC_32

#define ACCEL25_DETECTION_SHC_32   0x08

ACCEL25_DETECTION_SHC_64

#define ACCEL25_DETECTION_SHC_64   0x0C

ACCEL25_DETECTION_SHC_8

#define ACCEL25_DETECTION_SHC_8   0x00

ACCEL25_DETECTION_SHC_MASK

#define ACCEL25_DETECTION_SHC_MASK   0x0C

ACCEL25_DETECTION_SHM

#define ACCEL25_DETECTION_SHM   0x80

Accel 25 DETECTION register settings.

Specified settings for DETECTION register of Accel 25 Click driver.

ACCEL25_DETECTION_SHTH_0p25G

#define ACCEL25_DETECTION_SHTH_0p25G   0x00

ACCEL25_DETECTION_SHTH_0p5G

#define ACCEL25_DETECTION_SHTH_0p5G   0x10

ACCEL25_DETECTION_SHTH_0p75G

#define ACCEL25_DETECTION_SHTH_0p75G   0x20

ACCEL25_DETECTION_SHTH_1G

#define ACCEL25_DETECTION_SHTH_1G   0x30

ACCEL25_DETECTION_SHTH_1p25G

#define ACCEL25_DETECTION_SHTH_1p25G   0x40

ACCEL25_DETECTION_SHTH_1p5G

#define ACCEL25_DETECTION_SHTH_1p5G   0x50

ACCEL25_DETECTION_SHTH_1p75G

#define ACCEL25_DETECTION_SHTH_1p75G   0x60

ACCEL25_DETECTION_SHTH_2G

#define ACCEL25_DETECTION_SHTH_2G   0x70

ACCEL25_DETECTION_SHTH_MASK

#define ACCEL25_DETECTION_SHTH_MASK   0x70

ACCEL25_DEVICE_ADDRESS

#define ACCEL25_DEVICE_ADDRESS   0x15

Accel 25 device address setting.

Specified setting for device slave address selection of Accel 25 Click driver.

ACCEL25_DEVICE_ID

#define ACCEL25_DEVICE_ID   0x02

Accel 25 Device ID register value.

Specified Device ID register value of Accel 25 Click driver.

ACCEL25_FSR_2G

#define ACCEL25_FSR_2G   0

Accel 25 FSR settings.

Specified settings for FSR of Accel 25 Click driver.

ACCEL25_FSR_4G

#define ACCEL25_FSR_4G   1

ACCEL25_FSR_8G

#define ACCEL25_FSR_8G   2

ACCEL25_INT_CLR0_ALL

#define ACCEL25_INT_CLR0_ALL   0xCF

ACCEL25_INT_CLR0_ORXYC

#define ACCEL25_INT_CLR0_ORXYC   0x40

ACCEL25_INT_CLR0_ORZC

#define ACCEL25_INT_CLR0_ORZC   0x80

Accel 25 INT_CLR0 register settings.

Specified settings for INT_CLR0 register of Accel 25 Click driver.

ACCEL25_INT_CLR0_SHXMC

#define ACCEL25_INT_CLR0_SHXMC   0x02

ACCEL25_INT_CLR0_SHXPC

#define ACCEL25_INT_CLR0_SHXPC   0x01

ACCEL25_INT_CLR0_SHYMC

#define ACCEL25_INT_CLR0_SHYMC   0x08

ACCEL25_INT_CLR0_SHYPC

#define ACCEL25_INT_CLR0_SHYPC   0x04

ACCEL25_INT_CLR1_DRDYC

#define ACCEL25_INT_CLR1_DRDYC   0x01

ACCEL25_INT_CLR1_SW_RST

#define ACCEL25_INT_CLR1_SW_RST   0x10

Accel 25 INT_CLR1 register settings.

Specified settings for INT_CLR1 register of Accel 25 Click driver.

ACCEL25_INT_MASK0_ALL

#define ACCEL25_INT_MASK0_ALL   0xCF

ACCEL25_INT_MASK0_NONE

#define ACCEL25_INT_MASK0_NONE   0x00

ACCEL25_INT_MASK0_ORXYE

#define ACCEL25_INT_MASK0_ORXYE   0x40

ACCEL25_INT_MASK0_ORZE

#define ACCEL25_INT_MASK0_ORZE   0x80

Accel 25 INT_MASK0 register settings.

Specified settings for INT_MASK0 register of Accel 25 Click driver.

ACCEL25_INT_MASK0_SHXME

#define ACCEL25_INT_MASK0_SHXME   0x02

ACCEL25_INT_MASK0_SHXPE

#define ACCEL25_INT_MASK0_SHXPE   0x01

ACCEL25_INT_MASK0_SHYME

#define ACCEL25_INT_MASK0_SHYME   0x08

ACCEL25_INT_MASK0_SHYPE

#define ACCEL25_INT_MASK0_SHYPE   0x04

ACCEL25_INT_MASK1_DRDYE

#define ACCEL25_INT_MASK1_DRDYE   0x01

Accel 25 INT_MASK1 register settings.

Specified settings for INT_MASK1 register of Accel 25 Click driver.

ACCEL25_INT_SRC0_CHORXY

#define ACCEL25_INT_SRC0_CHORXY   0x40

ACCEL25_INT_SRC0_CHORZ

#define ACCEL25_INT_SRC0_CHORZ   0x80

Accel 25 description setting.

Specified setting for description of Accel 25 Click driver.

Accel 25 INT_SRC0 register settings.

Specified settings for INT_SRC0 register of Accel 25 Click driver.

ACCEL25_INT_SRC0_SHXM

#define ACCEL25_INT_SRC0_SHXM   0x02

ACCEL25_INT_SRC0_SHXP

#define ACCEL25_INT_SRC0_SHXP   0x01

ACCEL25_INT_SRC0_SHYM

#define ACCEL25_INT_SRC0_SHYM   0x08

ACCEL25_INT_SRC0_SHYP

#define ACCEL25_INT_SRC0_SHYP   0x04

ACCEL25_INT_SRC1_DRDY

#define ACCEL25_INT_SRC1_DRDY   0x01

ACCEL25_INT_SRC1_ORXY_MASK

#define ACCEL25_INT_SRC1_ORXY_MASK   0x30

ACCEL25_INT_SRC1_ORXY_X_MINUS

#define ACCEL25_INT_SRC1_ORXY_X_MINUS   0x20

ACCEL25_INT_SRC1_ORXY_X_PLUS

#define ACCEL25_INT_SRC1_ORXY_X_PLUS   0x00

ACCEL25_INT_SRC1_ORXY_Y_MINUS

#define ACCEL25_INT_SRC1_ORXY_Y_MINUS   0x30

ACCEL25_INT_SRC1_ORXY_Y_PLUS

#define ACCEL25_INT_SRC1_ORXY_Y_PLUS   0x10

ACCEL25_INT_SRC1_ORZ

#define ACCEL25_INT_SRC1_ORZ   0x40

ACCEL25_INT_SRC1_TILT

#define ACCEL25_INT_SRC1_TILT   0x80

Accel 25 INT_SRC1 register settings.

Specified settings for INT_SRC1 register of Accel 25 Click driver.

ACCEL25_PIN_STATE_HIGH

#define ACCEL25_PIN_STATE_HIGH   0x01

ACCEL25_PIN_STATE_LOW

#define ACCEL25_PIN_STATE_LOW   0x00

Accel 25 pin state value.

Specified pin state value of Accel 25 Click driver.

ACCEL25_STATUS_ORD

#define ACCEL25_STATUS_ORD   0x10

Accel 25 STATUS register settings.

Specified settings for STATUS register of Accel 25 Click driver.

ACCEL25_STATUS_ORIXY_LSB

#define ACCEL25_STATUS_ORIXY_LSB   0x01

ACCEL25_STATUS_ORIXY_MSB

#define ACCEL25_STATUS_ORIXY_MSB   0x02

ACCEL25_STATUS_ORIZ_LSB

#define ACCEL25_STATUS_ORIZ_LSB   0x04

ACCEL25_STATUS_ORIZ_MSB

#define ACCEL25_STATUS_ORIZ_MSB   0x08

ACCEL25_TEMP_NOMINAL

#define ACCEL25_TEMP_NOMINAL   25.0f

ACCEL25_TEMP_SENSITIVITY

#define ACCEL25_TEMP_SENSITIVITY   0.586f