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#define | ACCEL28_REG_TEMP_L 0x0B |
| Accel 28 description register.
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#define | ACCEL28_REG_TEMP_H 0x0C |
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#define | ACCEL28_REG_WHO_AM_I 0x0F |
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#define | ACCEL28_REG_ACT_THS 0x1E |
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#define | ACCEL28_REG_ACT_DUS 0x1F |
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#define | ACCEL28_REG_CTRL1 0x20 |
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#define | ACCEL28_REG_CTRL2 0x21 |
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#define | ACCEL28_REG_CTRL3 0x22 |
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#define | ACCEL28_REG_CTRL4 0x23 |
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#define | ACCEL28_REG_CTRL5 0x24 |
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#define | ACCEL28_REG_CTRL6 0x25 |
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#define | ACCEL28_REG_CTRL7 0x26 |
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#define | ACCEL28_REG_STATUS 0x27 |
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#define | ACCEL28_REG_OUT_X_L 0x28 |
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#define | ACCEL28_REG_OUT_X_H 0x29 |
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#define | ACCEL28_REG_OUT_Y_L 0x2A |
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#define | ACCEL28_REG_OUT_Y_H 0x2B |
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#define | ACCEL28_REG_OUT_Z_L 0x2C |
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#define | ACCEL28_REG_OUT_Z_H 0x2D |
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#define | ACCEL28_REG_FIFO_CTRL 0x2E |
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#define | ACCEL28_REG_FIFO_SRC 0x2F |
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#define | ACCEL28_REG_IG_CFG1 0x30 |
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#define | ACCEL28_REG_IG_SRC1 0x31 |
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#define | ACCEL28_REG_IG_THS_X1 0x32 |
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#define | ACCEL28_REG_IG_THS_Y1 0x33 |
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#define | ACCEL28_REG_IG_THS_Z1 0x34 |
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#define | ACCEL28_REG_IG_DUR1 0x35 |
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#define | ACCEL28_REG_IG_CFG2 0x36 |
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#define | ACCEL28_REG_IG_SRC2 0x37 |
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#define | ACCEL28_REG_IG_THS2 0x38 |
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#define | ACCEL28_REG_IG_DUR2 0x39 |
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#define | ACCEL28_REG_XL_REFERENCE 0x3A |
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#define | ACCEL28_REG_XH_REFERENCE 0x3B |
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#define | ACCEL28_REG_YL_REFERENCE 0x3C |
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#define | ACCEL28_REG_YH_REFERENCE 0x3D |
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#define | ACCEL28_REG_ZL_REFERENCE 0x3E |
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#define | ACCEL28_REG_ZH_REFERENCE 0x3F |
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#define | ACCEL28_WHO_AM_I_VALUE 0x41 |
| Accel 28 description setting.
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#define | ACCEL28_CTRL1_X_AXIS_ENABLE 0x01 |
| Accel 28 CTRL1 register setting.
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#define | ACCEL28_CTRL1_Y_AXIS_ENABLE 0x02 |
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#define | ACCEL28_CTRL1_Z_AXIS_ENABLE 0x04 |
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#define | ACCEL28_CTRL1_BLOCK_DATA_UPATE_EN 0x08 |
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#define | ACCEL28_CTRL1_ODR_POWER_DOWN 0x00 |
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#define | ACCEL28_CTRL1_ODR_10HZ 0x10 |
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#define | ACCEL28_CTRL1_ODR_50HZ 0x20 |
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#define | ACCEL28_CTRL1_ODR_100HZ 0x30 |
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#define | ACCEL28_CTRL1_ODR_200HZ 0x40 |
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#define | ACCEL28_CTRL1_ODR_400HZ 0x50 |
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#define | ACCEL28_CTRL1_ODR_800HZ 0x60 |
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#define | ACCEL28_CTRL1_ODR_NA 0x70 |
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#define | ACCEL28_CTRL1_HR_MODE 0x80 |
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#define | ACCEL28_CTRL2_HP_ENABLE_INT2 0x01 |
| Accel 28 CTRL2 register setting.
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#define | ACCEL28_CTRL2_HP_ENABLE_INT1 0x02 |
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#define | ACCEL28_CTRL2_FDS_ENABLE 0x04 |
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#define | ACCEL28_CTRL2_HPM_NORMAL_MODE 0x00 |
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#define | ACCEL28_CTRL2_HPM_REF_SIGNAL_FILTERING 0x08 |
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#define | ACCEL28_CTRL2_HPM_FREQ_DEV_50 0x00 |
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#define | ACCEL28_CTRL2_HPM_FREQ_DEV_100 0x20 |
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#define | ACCEL28_CTRL2_HPM_FREQ_DEV_9 0x40 |
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#define | ACCEL28_CTRL2_HPM_FREQ_DEV_400 0x60 |
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#define | ACCEL28_CTRL3_INT1_DRDY_EN 0x01 |
| Accel 28 CTRL3 register setting.
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#define | ACCEL28_CTRL3_INT1_FTH 0x02 |
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#define | ACCEL28_CTRL3_INT1_OVR 0x04 |
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#define | ACCEL28_CTRL3_INT1_IG1 0x08 |
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#define | ACCEL28_CTRL3_INT1_IG2 0x10 |
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#define | ACCEL28_CTRL3_INT1_INACT_EN 0x20 |
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#define | ACCEL28_CTRL3_STOP_FTH 0x40 |
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#define | ACCEL28_CTRL3_FIFO_EN 0x80 |
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#define | ACCEL28_CTRL4_SPI_MODE_3_WIRE 0x01 |
| Accel 28 CTRL4 register setting.
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#define | ACCEL28_CTRL4_SPI_MODE_4_WIRE 0x00 |
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#define | ACCEL28_CTRL4_I2C_DISABLED 0x02 |
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#define | ACCEL28_CTRL4_I2C_ENABLED 0x00 |
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#define | ACCEL28_CTRL4_ADD_INC_ENABLED 0x04 |
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#define | ACCEL28_CTRL4_BW_SCALE_ODR 0x00 |
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#define | ACCEL28_CTRL4_BW_SCALE_BW 0x08 |
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#define | ACCEL28_CTRL4_FS_2G 0x00 |
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#define | ACCEL28_CTRL4_FS_4G 0x20 |
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#define | ACCEL28_CTRL4_FS_8G 0x30 |
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#define | ACCEL28_CTRL4_FS_MASK 0x30 |
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#define | ACCEL28_CTRL4_BW_400HZ 0x00 |
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#define | ACCEL28_CTRL4_BW_200HZ 0x40 |
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#define | ACCEL28_CTRL4_BW_100HZ 0x80 |
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#define | ACCEL28_CTRL4_BW_50HZ 0xC0 |
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#define | ACCEL28_CTRL5_INT_PUSH_PULL 0x00 |
| Accel 28 CTRL5 register setting.
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#define | ACCEL28_CTRL5_INT_OPEN_DRAIN 0x01 |
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#define | ACCEL28_CTRL5_INT_ACTIVE_HIGH 0x00 |
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#define | ACCEL28_CTRL5_INT_ACTIVE_LOW 0x02 |
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#define | ACCEL28_CTRL5_NORMAL_MODE 0x00 |
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#define | ACCEL28_CTRL5_POSITIVE_SELF_TEST 0x04 |
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#define | ACCEL28_CTRL5_NEGATIVE_SELF_TEST 0x08 |
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#define | ACCEL28_CTRL5_DEC_UDATE_OFF 0x00 |
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#define | ACCEL28_CTRL5_DEC_UDATE_2_SAMPLES 0x10 |
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#define | ACCEL28_CTRL5_DEC_UDATE_4_SAMPLES 0x20 |
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#define | ACCEL28_CTRL5_DEC_UDATE_8_SAMPLES 0x30 |
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#define | ACCEL28_CTRL5_SW_RESET 0x40 |
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#define | ACCEL28_CTRL5_DEBUG_MODE 0x80 |
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#define | ACCEL28_CTRL6_INT2_DRDY 0x01 |
| Accel 28 CTRL6 register setting.
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#define | ACCEL28_CTRL6_INT2_FTH 0x02 |
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#define | ACCEL28_CTRL6_INT2_EMPTY 0x04 |
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#define | ACCEL28_CTRL6_INT2_IG1 0x08 |
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#define | ACCEL28_CTRL6_INT2_IG2 0x10 |
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#define | ACCEL28_CTRL6_INT2_BOOT 0x20 |
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#define | ACCEL28_CTRL6_BOOT 0x80 |
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#define | ACCEL28_STATUS_X_DATA_AVL 0x01 |
| Accel 28 STATUS register setting.
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#define | ACCEL28_STATUS_Y_DATA_AVL 0x02 |
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#define | ACCEL28_STATUS_Z_DATA_AVL 0x04 |
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#define | ACCEL28_STATUS_ZYX_DATA_AVL 0x08 |
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#define | ACCEL28_STATUS_X_DATA_OVERRUN 0x10 |
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#define | ACCEL28_STATUS_Y_DATA_OVERRUN 0x20 |
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#define | ACCEL28_STATUS_Z_DATA_OVERRUN 0x40 |
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#define | ACCEL28_STATUS_ZYX_DATA_OVERRUN 0x80 |
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#define | ACCEL28_2G_DATA_CONV 0.061f |
| Accel 28 conversion multiplier setting.
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#define | ACCEL28_4G_DATA_CONV 0.122f |
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#define | ACCEL28_8G_DATA_CONV 0.244f |
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#define | ACCEL28_PIN_STATE_HIGH 0x01 |
| Accel 28 pin state setting.
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#define | ACCEL28_PIN_STATE_LOW 0x00 |
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#define | ACCEL28_DEVICE_ADDRESS_0 0x1E |
| Accel 28 device address setting.
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#define | ACCEL28_DEVICE_ADDRESS_1 0x1D |
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#define | ACCEL28_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
| Data sample selection.
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#define | ACCEL28_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
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#define | ACCEL28_MAP_MIKROBUS(cfg, mikrobus) |
| MikroBUS pin mapping.
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