accel5 2.0.0.0
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Macros | |
#define | ACCEL5_FIFO_CFG0_Z_AXIS_ENABLE 0x80 |
#define | ACCEL5_FIFO_CFG0_Y_AXIS_ENABLE 0x40 |
#define | ACCEL5_FIFO_CFG0_X_AXIS_ENABLE 0x20 |
#define | ACCEL5_FIFO_CFG0_8bit_ENABLE 0x10 |
#define | ACCEL5_FIFO_CFG0_DATA_SRC_ENABLE 0x08 |
#define | ACCEL5_FIFO_CFG0_TIME_ENABLE 0x04 |
#define | ACCEL5_FIFO_CFG0_STOP_NO_FULL_ENABLE 0x02 |
#define | ACCEL5_FIFO_CFG0_AUTO_FLUSH_ENABLE 0x01 |
#define ACCEL5_FIFO_CFG0_8bit_ENABLE 0x10 |
#define ACCEL5_FIFO_CFG0_AUTO_FLUSH_ENABLE 0x01 |
#define ACCEL5_FIFO_CFG0_DATA_SRC_ENABLE 0x08 |
#define ACCEL5_FIFO_CFG0_STOP_NO_FULL_ENABLE 0x02 |
#define ACCEL5_FIFO_CFG0_TIME_ENABLE 0x04 |
#define ACCEL5_FIFO_CFG0_X_AXIS_ENABLE 0x20 |
#define ACCEL5_FIFO_CFG0_Y_AXIS_ENABLE 0x40 |
#define ACCEL5_FIFO_CFG0_Z_AXIS_ENABLE 0x80 |