accel5 2.0.0.0
Generic Interrupt 1 Config 0

Macros

#define ACCEL5_GEN1_CFG0_ACT_Z_ENABLE   0x80
 
#define ACCEL5_GEN1_CFG0_ACT_Y_ENABLE   0x40
 
#define ACCEL5_GEN1_CFG0_ACT_X_ENABLE   0x20
 
#define ACCEL5_GEN1_CFG0_DATA_ENABLE   0x10
 
#define ACCEL5_GEN1_CFG0_REFU_MANUAL   0x00
 
#define ACCEL5_GEN1_CFG0_REFU_ONETIME   0x04
 
#define ACCEL5_GEN1_CFG0_REFU_EVERYTIME   0x08
 
#define ACCEL5_GEN1_CFG0_HYST_24mg   0x01
 
#define ACCEL5_GEN1_CFG0_HYST_48mg   0x02
 
#define ACCEL5_GEN1_CFG0_HYST_96mg   0x03
 
#define ACCEL5_GEN1_CFG0_HYST_NO_ACTIVE   0x00
 

Detailed Description

Macro Definition Documentation

◆ ACCEL5_GEN1_CFG0_ACT_X_ENABLE

#define ACCEL5_GEN1_CFG0_ACT_X_ENABLE   0x20

◆ ACCEL5_GEN1_CFG0_ACT_Y_ENABLE

#define ACCEL5_GEN1_CFG0_ACT_Y_ENABLE   0x40

◆ ACCEL5_GEN1_CFG0_ACT_Z_ENABLE

#define ACCEL5_GEN1_CFG0_ACT_Z_ENABLE   0x80

◆ ACCEL5_GEN1_CFG0_DATA_ENABLE

#define ACCEL5_GEN1_CFG0_DATA_ENABLE   0x10

◆ ACCEL5_GEN1_CFG0_HYST_24mg

#define ACCEL5_GEN1_CFG0_HYST_24mg   0x01

◆ ACCEL5_GEN1_CFG0_HYST_48mg

#define ACCEL5_GEN1_CFG0_HYST_48mg   0x02

◆ ACCEL5_GEN1_CFG0_HYST_96mg

#define ACCEL5_GEN1_CFG0_HYST_96mg   0x03

◆ ACCEL5_GEN1_CFG0_HYST_NO_ACTIVE

#define ACCEL5_GEN1_CFG0_HYST_NO_ACTIVE   0x00

◆ ACCEL5_GEN1_CFG0_REFU_EVERYTIME

#define ACCEL5_GEN1_CFG0_REFU_EVERYTIME   0x08

◆ ACCEL5_GEN1_CFG0_REFU_MANUAL

#define ACCEL5_GEN1_CFG0_REFU_MANUAL   0x00

◆ ACCEL5_GEN1_CFG0_REFU_ONETIME

#define ACCEL5_GEN1_CFG0_REFU_ONETIME   0x04