accel5 2.0.0.0
Interrupt Status 0

Macros

#define ACCEL5_INT_STATUS_0_DATA_RDY_STATUS   0x80
 
#define ACCEL5_INT_STATUS_0_FIFO_WATERMARK   0x40
 
#define ACCEL5_INT_STATUS_0_FIFO_FULL   0x20
 
#define ACCEL5_INT_STATUS_0_IENG_OVERRUN_STATUS   0x10
 
#define ACCEL5_INT_STATUS_0_GEN2_INT_STATUS   0x08
 
#define ACCEL5_INT_STATUS_0_GEN1_INT_STATUS   0x04
 
#define ACCEL5_INT_STATUS_0_ORIENTCH_INT_STATUS   0x02
 
#define ACCEL5_INT_STATUS_0_WAKEUP_INT_STATUS   0x01
 

Detailed Description

Macro Definition Documentation

◆ ACCEL5_INT_STATUS_0_DATA_RDY_STATUS

#define ACCEL5_INT_STATUS_0_DATA_RDY_STATUS   0x80

◆ ACCEL5_INT_STATUS_0_FIFO_FULL

#define ACCEL5_INT_STATUS_0_FIFO_FULL   0x20

◆ ACCEL5_INT_STATUS_0_FIFO_WATERMARK

#define ACCEL5_INT_STATUS_0_FIFO_WATERMARK   0x40

◆ ACCEL5_INT_STATUS_0_GEN1_INT_STATUS

#define ACCEL5_INT_STATUS_0_GEN1_INT_STATUS   0x04

◆ ACCEL5_INT_STATUS_0_GEN2_INT_STATUS

#define ACCEL5_INT_STATUS_0_GEN2_INT_STATUS   0x08

◆ ACCEL5_INT_STATUS_0_IENG_OVERRUN_STATUS

#define ACCEL5_INT_STATUS_0_IENG_OVERRUN_STATUS   0x10

◆ ACCEL5_INT_STATUS_0_ORIENTCH_INT_STATUS

#define ACCEL5_INT_STATUS_0_ORIENTCH_INT_STATUS   0x02

◆ ACCEL5_INT_STATUS_0_WAKEUP_INT_STATUS

#define ACCEL5_INT_STATUS_0_WAKEUP_INT_STATUS   0x01