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accel5 2.0.0.0
|
| #define ACCEL5_REG_ACC_CONGIG_0 0x19 |
| #define ACCEL5_REG_ACC_CONGIG_1 0x1A |
| #define ACCEL5_REG_ACC_CONGIG_2 0x1B |
| #define ACCEL5_REG_ACC_X_LSB 0x04 |
| #define ACCEL5_REG_ACC_X_MSB 0x05 |
| #define ACCEL5_REG_ACC_Y_LSB 0x06 |
| #define ACCEL5_REG_ACC_Y_MSB 0x07 |
| #define ACCEL5_REG_ACC_Z_LSB 0x08 |
| #define ACCEL5_REG_ACC_Z_MSB 0x09 |
| #define ACCEL5_REG_ACTCH_CONFIG_0 0x55 |
| #define ACCEL5_REG_ACTCH_CONFIG_1 0x56 |
| #define ACCEL5_REG_AUTO_LOW_POW_0 0x2A |
| #define ACCEL5_REG_AUTO_LOW_POW_1 0x2B |
| #define ACCEL5_REG_AUTO_WAKEUP_0 0x2C |
| #define ACCEL5_REG_AUTO_WAKEUP_1 0x2D |
| #define ACCEL5_REG_CHIP_ID 0x00 |
| #define ACCEL5_REG_CMD 0x7E |
| #define ACCEL5_REG_ERR_REG 0x02 |
| #define ACCEL5_REG_EVENT 0x0D |
| #define ACCEL5_REG_FIFO_CONFIG_0 0x26 |
| #define ACCEL5_REG_FIFO_CONFIG_1 0x27 |
| #define ACCEL5_REG_FIFO_CONFIG_2 0x28 |
| #define ACCEL5_REG_FIFO_DATA 0x14 |
| #define ACCEL5_REG_FIFO_LENGTH_0 0x12 |
| #define ACCEL5_REG_FIFO_LENGTH_1 0x13 |
| #define ACCEL5_REG_FIFO_PWR_CONFIG 0x29 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_0 0x3F |
| #define ACCEL5_REG_GEN1_INT_CONFIG_1 0x40 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_2 0x41 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_3 0x42 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_31 0x43 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_4 0x44 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_5 0x45 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_6 0x46 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_7 0x47 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_8 0x48 |
| #define ACCEL5_REG_GEN1_INT_CONFIG_9 0x49 |
| #define ACCEL5_REG_GEN2_INT_CONFIG_0 0x4A |
| #define ACCEL5_REG_GEN2_INT_CONFIG_1 0x4B |
| #define ACCEL5_REG_GEN2_INT_CONFIG_2 0x4C |
| #define ACCEL5_REG_GEN2_INT_CONFIG_3 0x4D |
| #define ACCEL5_REG_GEN2_INT_CONFIG_31 0x4E |
| #define ACCEL5_REG_GEN2_INT_CONFIG_4 0x4F |
| #define ACCEL5_REG_GEN2_INT_CONFIG_5 0x50 |
| #define ACCEL5_REG_GEN2_INT_CONFIG_6 0x51 |
| #define ACCEL5_REG_GEN2_INT_CONFIG_7 0x52 |
| #define ACCEL5_REG_GEN2_INT_CONFIG_8 0x53 |
| #define ACCEL5_REG_GEN2_INT_CONFIG_9 0x54 |
| #define ACCEL5_REG_IF_CONFIG 0x7C |
| #define ACCEL5_REG_INT12_IO_CTRL 0x24 |
| #define ACCEL5_REG_INT12_MAP 0x23 |
| #define ACCEL5_REG_INT1_MAP 0x21 |
| #define ACCEL5_REG_INT2_MAP 0x22 |
| #define ACCEL5_REG_INT_CONFIG_0 0x1F |
| #define ACCEL5_REG_INT_CONFIG_1 0x20 |
| #define ACCEL5_REG_INT_STATUS_0 0x0E |
| #define ACCEL5_REG_INT_STATUS_1 0x0F |
| #define ACCEL5_REG_INT_STATUS_2 0x10 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_0 0x35 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_1 0x36 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_2 0x37 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_3 0x38 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_4 0x39 |
| #define ACCEL5_REG_ORIENTCH_CONFIG_5 0x3A |
| #define ACCEL5_REG_ORIENTCH_CONFIG_6 0x3B |
| #define ACCEL5_REG_ORIENTCH_CONFIG_7 0x3C |
| #define ACCEL5_REG_ORIENTCH_CONFIG_8 0x3D |
| #define ACCEL5_REG_ORIENTCH_CONFIG_9 0x3E |
| #define ACCEL5_REG_SELF_TEST 0x7D |
| #define ACCEL5_REG_SENSOR_TIME_0 0x0A |
| #define ACCEL5_REG_SENSOR_TIME_1 0x0B |
| #define ACCEL5_REG_SENSOR_TIME_2 0x0C |
| #define ACCEL5_REG_STATUS 0x03 |
| #define ACCEL5_REG_STEP_CNT_0 0x15 |
| #define ACCEL5_REG_STEP_CNT_1 0x16 |
| #define ACCEL5_REG_STEP_CNT_2 0x17 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_0 0x59 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_1 0x5A |
| #define ACCEL5_REG_STEP_CNT_CONFIG_10 0x63 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_11 0x64 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_12 0x65 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_13 0x66 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_14 0x67 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_15 0x68 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_16 0x69 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_17 0x6A |
| #define ACCEL5_REG_STEP_CNT_CONFIG_18 0x6B |
| #define ACCEL5_REG_STEP_CNT_CONFIG_19 0x6C |
| #define ACCEL5_REG_STEP_CNT_CONFIG_2 0x5B |
| #define ACCEL5_REG_STEP_CNT_CONFIG_20 0x6D |
| #define ACCEL5_REG_STEP_CNT_CONFIG_21 0x6E |
| #define ACCEL5_REG_STEP_CNT_CONFIG_22 0x6F |
| #define ACCEL5_REG_STEP_CNT_CONFIG_23 0x70 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_24 0x71 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_3 0x5C |
| #define ACCEL5_REG_STEP_CNT_CONFIG_4 0x5D |
| #define ACCEL5_REG_STEP_CNT_CONFIG_5 0x5E |
| #define ACCEL5_REG_STEP_CNT_CONFIG_6 0x5F |
| #define ACCEL5_REG_STEP_CNT_CONFIG_7 0x60 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_8 0x61 |
| #define ACCEL5_REG_STEP_CNT_CONFIG_9 0x62 |
| #define ACCEL5_REG_STEP_STATUS 0x18 |
| #define ACCEL5_REG_TAP_CONFIG_0 0x57 |
| #define ACCEL5_REG_TAP_CONFIG_1 0x58 |
| #define ACCEL5_REG_TEMPERATURE 0x11 |
| #define ACCEL5_REG_WAKEUP_CONFIG_0 0x2F |
| #define ACCEL5_REG_WAKEUP_CONFIG_1 0x30 |
| #define ACCEL5_REG_WAKEUP_CONFIG_2 0x31 |
| #define ACCEL5_REG_WAKEUP_CONFIG_3 0x32 |
| #define ACCEL5_REG_WAKEUP_CONFIG_4 0x33 |