Macros
#define	ACCEL7_CTRL_REG1_MODE_OPERATING 0x80

#define	ACCEL7_CTRL_REG1_MODE_STANDBY 0x00

#define	ACCEL7_CTRL_REG1_RES_LOW_CURRENT 0x00

#define	ACCEL7_CTRL_REG1_RES_HIGH_RESOLUTION 0x40

#define	ACCEL7_CTRL_REG1_DRDYE_ENABLE 0x20

#define	ACCEL7_CTRL_REG1_DRDYE_DISABLE 0x00

#define	ACCEL7_CTRL_REG1_RANGE_2g 0x00

#define	ACCEL7_CTRL_REG1_RANGE_4g 0x08

#define	ACCEL7_CTRL_REG1_RANGE_8g 0x10

#define	ACCEL7_CTRL_REG1_RANGE_16g 0x04

#define	ACCEL7_CTRL_REG1_RANGE_HIGH_RES_8g 0x18

#define	ACCEL7_CTRL_REG1_RANGE_HIGH_RES_16g 0x1C

#define	ACCEL7_CTRL_REG1_WAKEUP_DISABLE 0x00

#define	ACCEL7_CTRL_REG1_WAKEUP_ENABLE 0x02

#define	ACCEL7_CTRL_REG2_START_RAM_REBOOT 0x80

#define	ACCEL7_CTRL_REG2_DCST_ENABLE 0x10

#define	ACCEL7_CTRL_REG2_DCST_DISABLE 0x00

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_0_781Hz 0x00

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_1_563Hz 0x01

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_3_125Hz 0x02

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_6_25Hz 0x03

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_12_5Hz 0x04

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_25Hz 0x05

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_50Hz 0x06

#define	ACCEL7_CTRL_REG2_OUT_DATA_RATE_100Hz 0x07

Detailed Description

Macro Definition Documentation

◆ ACCEL7_CTRL_REG1_DRDYE_DISABLE

#define ACCEL7_CTRL_REG1_DRDYE_DISABLE 0x00

◆ ACCEL7_CTRL_REG1_DRDYE_ENABLE

#define ACCEL7_CTRL_REG1_DRDYE_ENABLE 0x20

◆ ACCEL7_CTRL_REG1_MODE_OPERATING

#define ACCEL7_CTRL_REG1_MODE_OPERATING 0x80

◆ ACCEL7_CTRL_REG1_MODE_STANDBY

#define ACCEL7_CTRL_REG1_MODE_STANDBY 0x00

◆ ACCEL7_CTRL_REG1_RANGE_16g

#define ACCEL7_CTRL_REG1_RANGE_16g 0x04

◆ ACCEL7_CTRL_REG1_RANGE_2g

#define ACCEL7_CTRL_REG1_RANGE_2g 0x00

◆ ACCEL7_CTRL_REG1_RANGE_4g

#define ACCEL7_CTRL_REG1_RANGE_4g 0x08

◆ ACCEL7_CTRL_REG1_RANGE_8g

#define ACCEL7_CTRL_REG1_RANGE_8g 0x10

◆ ACCEL7_CTRL_REG1_RANGE_HIGH_RES_16g

#define ACCEL7_CTRL_REG1_RANGE_HIGH_RES_16g 0x1C

◆ ACCEL7_CTRL_REG1_RANGE_HIGH_RES_8g

#define ACCEL7_CTRL_REG1_RANGE_HIGH_RES_8g 0x18

◆ ACCEL7_CTRL_REG1_RES_HIGH_RESOLUTION

#define ACCEL7_CTRL_REG1_RES_HIGH_RESOLUTION 0x40

◆ ACCEL7_CTRL_REG1_RES_LOW_CURRENT

#define ACCEL7_CTRL_REG1_RES_LOW_CURRENT 0x00

◆ ACCEL7_CTRL_REG1_WAKEUP_DISABLE

#define ACCEL7_CTRL_REG1_WAKEUP_DISABLE 0x00

◆ ACCEL7_CTRL_REG1_WAKEUP_ENABLE

#define ACCEL7_CTRL_REG1_WAKEUP_ENABLE 0x02

◆ ACCEL7_CTRL_REG2_DCST_DISABLE

#define ACCEL7_CTRL_REG2_DCST_DISABLE 0x00

◆ ACCEL7_CTRL_REG2_DCST_ENABLE

#define ACCEL7_CTRL_REG2_DCST_ENABLE 0x10

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_0_781Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_0_781Hz 0x00

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_100Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_100Hz 0x07

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_12_5Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_12_5Hz 0x04

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_1_563Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_1_563Hz 0x01

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_25Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_25Hz 0x05

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_3_125Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_3_125Hz 0x02

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_50Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_50Hz 0x06

◆ ACCEL7_CTRL_REG2_OUT_DATA_RATE_6_25Hz

#define ACCEL7_CTRL_REG2_OUT_DATA_RATE_6_25Hz 0x03

◆ ACCEL7_CTRL_REG2_START_RAM_REBOOT

#define ACCEL7_CTRL_REG2_START_RAM_REBOOT 0x80

Macros