adc10 2.0.0.0
Macros
ADC 10 Device Settings
ADC 10 Click Driver

Settings for registers of ADC 10 Click driver. More...

Macros

#define ADC10_SYNC_WORD   0x55
 ADC 10 commands description setting.
 
#define ADC10_CMD_RESET   0x06
 
#define ADC10_CMD_START   0x08
 
#define ADC10_CMD_POWERDOWN   0x03
 
#define ADC10_CMD_RDATA   0x10
 
#define ADC10_CMD_RREG   0x20
 
#define ADC10_CMD_WREG   0x40
 
#define ADC10_REG0_MUX_P0_N1   0x00
 ADC 10 Configuration Register 0 description setting.
 
#define ADC10_REG0_MUX_P0_N2   0x01
 
#define ADC10_REG0_MUX_P0_N3   0x02
 
#define ADC10_REG0_MUX_P1_N0   0x03
 
#define ADC10_REG0_MUX_P1_N2   0x04
 
#define ADC10_REG0_MUX_P1_N3   0x05
 
#define ADC10_REG0_MUX_P2_N3   0x06
 
#define ADC10_REG0_MUX_P3_N2   0x07
 
#define ADC10_REG0_MUX_P0_NS   0x08
 
#define ADC10_REG0_MUX_P1_NS   0x09
 
#define ADC10_REG0_MUX_P2_NS   0x0A
 
#define ADC10_REG0_MUX_P3_NS   0x0B
 
#define ADC10_REG0_MUX_VREF   0x0C
 
#define ADC10_REG0_MUX_AVOLD_4   0x0D
 
#define ADC10_REG0_MUX_AVOLAVER   0x0E
 
#define ADC10_REG0_MUX_RESERVE   0x0F
 
#define ADC10_REG0_GAIN_1   0x00
 ADC 10 Configuration Register 0 description setting.
 
#define ADC10_REG0_GAIN_2   0x01
 
#define ADC10_REG0_GAIN_4   0x02
 
#define ADC10_REG0_GAIN_8   0x03
 
#define ADC10_REG0_GAIN_16   0x04
 
#define ADC10_REG0_GAIN_32   0x05
 
#define ADC10_REG0_GAIN_64   0x06
 
#define ADC10_REG0_GAIN_128   0x07
 
#define ADC10_REG0_PGA_ENABLED   0x00
 ADC 10 Configuration Register 0 description setting.
 
#define ADC10_REG0_PGA_DISABLED   0x01
 
#define ADC10_REG1_DR_NORMAL_20   0x00
 ADC 10 Configuration Register 1 description setting.
 
#define ADC10_REG1_DR_NORMAL_45   0x01
 
#define ADC10_REG1_DR_NORMAL_90   0x02
 
#define ADC10_REG1_DR_NORMAL_175   0x03
 
#define ADC10_REG1_DR_NORMAL_330   0x04
 
#define ADC10_REG1_DR_NORMAL_600   0x05
 
#define ADC10_REG1_DR_NORMAL_1000   0x06
 
#define ADC10_REG1_DR_TURBO_40   0x00
 
#define ADC10_REG1_DR_TURBO_90   0x01
 
#define ADC10_REG1_DR_TURBO_180   0x02
 
#define ADC10_REG1_DR_TURBO_350   0x03
 
#define ADC10_REG1_DR_TURBO_660   0x04
 
#define ADC10_REG1_DR_TURBO_1200   0x05
 
#define ADC10_REG1_DR_TURBO_2000   0x06
 
#define ADC10_REG1_MODE_NORMAL   0x00
 ADC 10 Configuration Register 1 description setting.
 
#define ADC10_REG1_MODE_TURBO   0x01
 
#define ADC10_REG1_CM_SINGAL_SHOT   0x00
 ADC 10 Configuration Register 1 description setting.
 
#define ADC10_REG1_CM_CONTINUOUS   0x01
 
#define ADC10_REG1_VREF_INTERNAL_2048   0x00
 ADC 10 Configuration Register 1 description setting.
 
#define ADC10_REG1_VREF_EXTERNAL_REF   0x01
 
#define ADC10_REG1_VREF_ANALOG_1   0x02
 
#define ADC10_REG1_VREF_ANALOG_2   0x03
 
#define ADC10_REG1_TS_DISABLED   0x00
 ADC 10 Configuration Register 1 description setting.
 
#define ADC10_REG1_TS_ENABLED   0x01
 
#define ADC10_REG2_DRDY_NOT_READY   0x00
 ADC 10 Configuration Register 2 description setting.
 
#define ADC10_REG2_DRDY_READY   0x01
 
#define ADC10_REG2_DCNT_DISABLED   0x00
 ADC 10 Configuration Register 2 description setting.
 
#define ADC10_REG2_DCNT_ENABLED   0x01
 
#define ADC10_REG2_CRC_DISABLED   0x00
 ADC 10 Configuration Register 2 description setting.
 
#define ADC10_REG2_CRC_INVERTED_ENABLED   0x01
 
#define ADC10_REG2_CRC_CRC16_ENABLED   0x02
 
#define ADC10_REG2_CRC_RESERVED   0x03
 
#define ADC10_REG2_BCS_CURRENT_SOURCE_OFF   0x00
 ADC 10 Configuration Register 2 description setting.
 
#define ADC10_REG2_BCS_CURRENT_SOURCE_ON   0x01
 
#define ADC10_REG2_IDAC_CURRENT_OFF   0x00
 ADC 10 Configuration Register 2 description setting.
 
#define ADC10_REG2_IDAC_CURRENT_10_uA   0x01
 
#define ADC10_REG2_IDAC_CURRENT_50_uA   0x02
 
#define ADC10_REG2_IDAC_CURRENT_100_uA   0x03
 
#define ADC10_REG2_IDAC_CURRENT_250_uA   0x04
 
#define ADC10_REG2_IDAC_CURRENT_500_uA   0x05
 
#define ADC10_REG2_IDAC_CURRENT_1000_uA   0x06
 
#define ADC10_REG2_IDAC_CURRENT_1500_uA   0x07
 
#define ADC10_REG3_L1MUX_DISABLED   0x00
 ADC 10 Configuration Register 3 description setting.
 
#define ADC10_REG3_L1MUX_TO_AIN0   0x01
 
#define ADC10_REG3_L1MUX_TO_AIN1   0x02
 
#define ADC10_REG3_L1MUX_TO_AIN2   0x03
 
#define ADC10_REG3_L1MUX_TO_AIN3   0x04
 
#define ADC10_REG3_L1MUX_TO_REFP   0x05
 
#define ADC10_REG3_L1MUX_TO_REFN   0x06
 
#define ADC10_REG3_L1MUX_RESERVED   0x07
 
#define ADC10_REG3_L2MUX_DISABLED   0x00
 ADC 10 Configuration Register 3 description setting.
 
#define ADC10_REG3_L2MUX_TO_AIN0   0x01
 
#define ADC10_REG3_L2MUX_TO_AIN1   0x02
 
#define ADC10_REG3_L2MUX_TO_AIN2   0x03
 
#define ADC10_REG3_L2MUX_TO_AIN3   0x04
 
#define ADC10_REG3_L2MUX_TO_REFP   0x05
 
#define ADC10_REG3_L2MUX_TO_REFN   0x06
 
#define ADC10_REG3_DATA_MODE_MANUAL   0x00
 ADC 10 Configuration Register 3 description setting.
 
#define ADC10_REG3_DATA_MODE_AUTO   0x01
 
#define ADC10_REG4_GPIO2_DIR_INPUT   0x00
 ADC 10 Configuration Register 4 description setting.
 
#define ADC10_REG4_GPIO2_DIR_OUTPUT   0x01
 
#define ADC10_REG4_GPIO1_DIR_INPUT   0x00
 
#define ADC10_REG4_GPIO1_DIR_OUTPUT   0x01
 
#define ADC10_REG4_GPIO0_DIR_INPUT   0x00
 
#define ADC10_REG4_GPIO0_DIR_OUTPUT   0x01
 
#define ADC10_REG4_GPIO2_SEL_DAT   0x00
 ADC 10 Configuration Register 4 description setting.
 
#define ADC10_REG4_GPIO2_SEL_DRDY   0x01
 
#define ADC10_REG4_GPIO_LOW   0x00
 ADC 10 Configuration Register 4 description setting.
 
#define ADC10_REG4_GPIO_HIGH   0x01
 
#define ADC10_ANALOG_INPUT_CH_0   0x00
 ADC 10 Configuration analog input setting.
 
#define ADC10_ANALOG_INPUT_CH_1   0x01
 
#define ADC10_ANALOG_INPUT_CH_2   0x02
 
#define ADC10_ANALOG_INPUT_CH_3   0x03
 
#define ADC10_NEW_DATA_IS_READY   0x00
 ADC 10 Configuration data ready setting.
 
#define ADC10_NEW_DATA_NOT_READY   0x01
 
#define ADC10_GAIN_1   1
 ADC 10 Gain value.
 
#define ADC10_GAIN_2   2
 
#define ADC10_GAIN_4   4
 
#define ADC10_GAIN_8   8
 
#define ADC10_GAIN_16   16
 
#define ADC10_GAIN_32   32
 
#define ADC10_GAIN_64   64
 
#define ADC10_GAIN_128   128
 
#define ADC10_REG_BITS   0x0E
 ADC 10 Configuration Vref and resolution setting.
 
#define ADC10_ADC_RESOLUTION   0x007FFFFF
 
#define ADC10_VREF_INTERNAL   2048.0
 
#define ADC10_VREF_EXTERNAL_3300_mA   3300.0
 
#define ADC10_VREF_EXTERNAL_5000_mA   5000.0
 
#define DRV_BUFFER_SIZE   200
 ADC 10 driver buffer size.
 

Detailed Description

Settings for registers of ADC 10 Click driver.

Macro Definition Documentation

◆ ADC10_ADC_RESOLUTION

#define ADC10_ADC_RESOLUTION   0x007FFFFF

◆ ADC10_ANALOG_INPUT_CH_0

#define ADC10_ANALOG_INPUT_CH_0   0x00

ADC 10 Configuration analog input setting.

Specified analog input of ADC 10 Click driver.

◆ ADC10_ANALOG_INPUT_CH_1

#define ADC10_ANALOG_INPUT_CH_1   0x01

◆ ADC10_ANALOG_INPUT_CH_2

#define ADC10_ANALOG_INPUT_CH_2   0x02

◆ ADC10_ANALOG_INPUT_CH_3

#define ADC10_ANALOG_INPUT_CH_3   0x03

◆ ADC10_CMD_POWERDOWN

#define ADC10_CMD_POWERDOWN   0x03

◆ ADC10_CMD_RDATA

#define ADC10_CMD_RDATA   0x10

◆ ADC10_CMD_RESET

#define ADC10_CMD_RESET   0x06

◆ ADC10_CMD_RREG

#define ADC10_CMD_RREG   0x20

◆ ADC10_CMD_START

#define ADC10_CMD_START   0x08

◆ ADC10_CMD_WREG

#define ADC10_CMD_WREG   0x40

◆ ADC10_GAIN_1

#define ADC10_GAIN_1   1

ADC 10 Gain value.

Specified gain value of ADC 10 Click driver.

◆ ADC10_GAIN_128

#define ADC10_GAIN_128   128

◆ ADC10_GAIN_16

#define ADC10_GAIN_16   16

◆ ADC10_GAIN_2

#define ADC10_GAIN_2   2

◆ ADC10_GAIN_32

#define ADC10_GAIN_32   32

◆ ADC10_GAIN_4

#define ADC10_GAIN_4   4

◆ ADC10_GAIN_64

#define ADC10_GAIN_64   64

◆ ADC10_GAIN_8

#define ADC10_GAIN_8   8

◆ ADC10_NEW_DATA_IS_READY

#define ADC10_NEW_DATA_IS_READY   0x00

ADC 10 Configuration data ready setting.

Specified data ready of ADC 10 Click driver.

◆ ADC10_NEW_DATA_NOT_READY

#define ADC10_NEW_DATA_NOT_READY   0x01

◆ ADC10_REG0_GAIN_1

#define ADC10_REG0_GAIN_1   0x00

ADC 10 Configuration Register 0 description setting.

Specified Gain configuration setting for description of ADC 10 Click driver.

◆ ADC10_REG0_GAIN_128

#define ADC10_REG0_GAIN_128   0x07

◆ ADC10_REG0_GAIN_16

#define ADC10_REG0_GAIN_16   0x04

◆ ADC10_REG0_GAIN_2

#define ADC10_REG0_GAIN_2   0x01

◆ ADC10_REG0_GAIN_32

#define ADC10_REG0_GAIN_32   0x05

◆ ADC10_REG0_GAIN_4

#define ADC10_REG0_GAIN_4   0x02

◆ ADC10_REG0_GAIN_64

#define ADC10_REG0_GAIN_64   0x06

◆ ADC10_REG0_GAIN_8

#define ADC10_REG0_GAIN_8   0x03

◆ ADC10_REG0_MUX_AVOLAVER

#define ADC10_REG0_MUX_AVOLAVER   0x0E

◆ ADC10_REG0_MUX_AVOLD_4

#define ADC10_REG0_MUX_AVOLD_4   0x0D

◆ ADC10_REG0_MUX_P0_N1

#define ADC10_REG0_MUX_P0_N1   0x00

ADC 10 Configuration Register 0 description setting.

Specified Input multiplexer configuration setting for description of ADC 10 Click driver.

◆ ADC10_REG0_MUX_P0_N2

#define ADC10_REG0_MUX_P0_N2   0x01

◆ ADC10_REG0_MUX_P0_N3

#define ADC10_REG0_MUX_P0_N3   0x02

◆ ADC10_REG0_MUX_P0_NS

#define ADC10_REG0_MUX_P0_NS   0x08

◆ ADC10_REG0_MUX_P1_N0

#define ADC10_REG0_MUX_P1_N0   0x03

◆ ADC10_REG0_MUX_P1_N2

#define ADC10_REG0_MUX_P1_N2   0x04

◆ ADC10_REG0_MUX_P1_N3

#define ADC10_REG0_MUX_P1_N3   0x05

◆ ADC10_REG0_MUX_P1_NS

#define ADC10_REG0_MUX_P1_NS   0x09

◆ ADC10_REG0_MUX_P2_N3

#define ADC10_REG0_MUX_P2_N3   0x06

◆ ADC10_REG0_MUX_P2_NS

#define ADC10_REG0_MUX_P2_NS   0x0A

◆ ADC10_REG0_MUX_P3_N2

#define ADC10_REG0_MUX_P3_N2   0x07

◆ ADC10_REG0_MUX_P3_NS

#define ADC10_REG0_MUX_P3_NS   0x0B

◆ ADC10_REG0_MUX_RESERVE

#define ADC10_REG0_MUX_RESERVE   0x0F

◆ ADC10_REG0_MUX_VREF

#define ADC10_REG0_MUX_VREF   0x0C

◆ ADC10_REG0_PGA_DISABLED

#define ADC10_REG0_PGA_DISABLED   0x01

◆ ADC10_REG0_PGA_ENABLED

#define ADC10_REG0_PGA_ENABLED   0x00

ADC 10 Configuration Register 0 description setting.

Specified Disables and bypasses the internal low-noise PGA setting for description of ADC 10 Click driver.

◆ ADC10_REG1_CM_CONTINUOUS

#define ADC10_REG1_CM_CONTINUOUS   0x01

◆ ADC10_REG1_CM_SINGAL_SHOT

#define ADC10_REG1_CM_SINGAL_SHOT   0x00

ADC 10 Configuration Register 1 description setting.

Specified Conversion mode for description of ADC 10 Click driver.

◆ ADC10_REG1_DR_NORMAL_1000

#define ADC10_REG1_DR_NORMAL_1000   0x06

◆ ADC10_REG1_DR_NORMAL_175

#define ADC10_REG1_DR_NORMAL_175   0x03

◆ ADC10_REG1_DR_NORMAL_20

#define ADC10_REG1_DR_NORMAL_20   0x00

ADC 10 Configuration Register 1 description setting.

Specified Data rate setting for description of ADC 10 Click driver.

◆ ADC10_REG1_DR_NORMAL_330

#define ADC10_REG1_DR_NORMAL_330   0x04

◆ ADC10_REG1_DR_NORMAL_45

#define ADC10_REG1_DR_NORMAL_45   0x01

◆ ADC10_REG1_DR_NORMAL_600

#define ADC10_REG1_DR_NORMAL_600   0x05

◆ ADC10_REG1_DR_NORMAL_90

#define ADC10_REG1_DR_NORMAL_90   0x02

◆ ADC10_REG1_DR_TURBO_1200

#define ADC10_REG1_DR_TURBO_1200   0x05

◆ ADC10_REG1_DR_TURBO_180

#define ADC10_REG1_DR_TURBO_180   0x02

◆ ADC10_REG1_DR_TURBO_2000

#define ADC10_REG1_DR_TURBO_2000   0x06

◆ ADC10_REG1_DR_TURBO_350

#define ADC10_REG1_DR_TURBO_350   0x03

◆ ADC10_REG1_DR_TURBO_40

#define ADC10_REG1_DR_TURBO_40   0x00

◆ ADC10_REG1_DR_TURBO_660

#define ADC10_REG1_DR_TURBO_660   0x04

◆ ADC10_REG1_DR_TURBO_90

#define ADC10_REG1_DR_TURBO_90   0x01

◆ ADC10_REG1_MODE_NORMAL

#define ADC10_REG1_MODE_NORMAL   0x00

ADC 10 Configuration Register 1 description setting.

Specified Operating mode for description of ADC 10 Click driver.

◆ ADC10_REG1_MODE_TURBO

#define ADC10_REG1_MODE_TURBO   0x01

◆ ADC10_REG1_TS_DISABLED

#define ADC10_REG1_TS_DISABLED   0x00

ADC 10 Configuration Register 1 description setting.

Specified Temperature sensor mode for description of ADC 10 Click driver.

◆ ADC10_REG1_TS_ENABLED

#define ADC10_REG1_TS_ENABLED   0x01

◆ ADC10_REG1_VREF_ANALOG_1

#define ADC10_REG1_VREF_ANALOG_1   0x02

◆ ADC10_REG1_VREF_ANALOG_2

#define ADC10_REG1_VREF_ANALOG_2   0x03

◆ ADC10_REG1_VREF_EXTERNAL_REF

#define ADC10_REG1_VREF_EXTERNAL_REF   0x01

◆ ADC10_REG1_VREF_INTERNAL_2048

#define ADC10_REG1_VREF_INTERNAL_2048   0x00

ADC 10 Configuration Register 1 description setting.

Specified Voltage reference selection for description of ADC 10 Click driver.

◆ ADC10_REG2_BCS_CURRENT_SOURCE_OFF

#define ADC10_REG2_BCS_CURRENT_SOURCE_OFF   0x00

ADC 10 Configuration Register 2 description setting.

Specified Burn-out current sources for description of ADC 10 Click driver.

◆ ADC10_REG2_BCS_CURRENT_SOURCE_ON

#define ADC10_REG2_BCS_CURRENT_SOURCE_ON   0x01

◆ ADC10_REG2_CRC_CRC16_ENABLED

#define ADC10_REG2_CRC_CRC16_ENABLED   0x02

◆ ADC10_REG2_CRC_DISABLED

#define ADC10_REG2_CRC_DISABLED   0x00

ADC 10 Configuration Register 2 description setting.

Specified Data integrity check enable for description of ADC 10 Click driver.

◆ ADC10_REG2_CRC_INVERTED_ENABLED

#define ADC10_REG2_CRC_INVERTED_ENABLED   0x01

◆ ADC10_REG2_CRC_RESERVED

#define ADC10_REG2_CRC_RESERVED   0x03

◆ ADC10_REG2_DCNT_DISABLED

#define ADC10_REG2_DCNT_DISABLED   0x00

ADC 10 Configuration Register 2 description setting.

Specified Data counter enable for description of ADC 10 Click driver.

◆ ADC10_REG2_DCNT_ENABLED

#define ADC10_REG2_DCNT_ENABLED   0x01

◆ ADC10_REG2_DRDY_NOT_READY

#define ADC10_REG2_DRDY_NOT_READY   0x00

ADC 10 Configuration Register 2 description setting.

Specified Conversion result ready flag for description of ADC 10 Click driver.

◆ ADC10_REG2_DRDY_READY

#define ADC10_REG2_DRDY_READY   0x01

◆ ADC10_REG2_IDAC_CURRENT_1000_uA

#define ADC10_REG2_IDAC_CURRENT_1000_uA   0x06

◆ ADC10_REG2_IDAC_CURRENT_100_uA

#define ADC10_REG2_IDAC_CURRENT_100_uA   0x03

◆ ADC10_REG2_IDAC_CURRENT_10_uA

#define ADC10_REG2_IDAC_CURRENT_10_uA   0x01

◆ ADC10_REG2_IDAC_CURRENT_1500_uA

#define ADC10_REG2_IDAC_CURRENT_1500_uA   0x07

◆ ADC10_REG2_IDAC_CURRENT_250_uA

#define ADC10_REG2_IDAC_CURRENT_250_uA   0x04

◆ ADC10_REG2_IDAC_CURRENT_500_uA

#define ADC10_REG2_IDAC_CURRENT_500_uA   0x05

◆ ADC10_REG2_IDAC_CURRENT_50_uA

#define ADC10_REG2_IDAC_CURRENT_50_uA   0x02

◆ ADC10_REG2_IDAC_CURRENT_OFF

#define ADC10_REG2_IDAC_CURRENT_OFF   0x00

ADC 10 Configuration Register 2 description setting.

Specified IDAC current setting for description of ADC 10 Click driver.

◆ ADC10_REG3_DATA_MODE_AUTO

#define ADC10_REG3_DATA_MODE_AUTO   0x01

◆ ADC10_REG3_DATA_MODE_MANUAL

#define ADC10_REG3_DATA_MODE_MANUAL   0x00

ADC 10 Configuration Register 3 description setting.

Specified ADC data output mode for description of ADC 10 Click driver.

◆ ADC10_REG3_L1MUX_DISABLED

#define ADC10_REG3_L1MUX_DISABLED   0x00

ADC 10 Configuration Register 3 description setting.

Specified IDAC1 routing configuration for description of ADC 10 Click driver.

◆ ADC10_REG3_L1MUX_RESERVED

#define ADC10_REG3_L1MUX_RESERVED   0x07

◆ ADC10_REG3_L1MUX_TO_AIN0

#define ADC10_REG3_L1MUX_TO_AIN0   0x01

◆ ADC10_REG3_L1MUX_TO_AIN1

#define ADC10_REG3_L1MUX_TO_AIN1   0x02

◆ ADC10_REG3_L1MUX_TO_AIN2

#define ADC10_REG3_L1MUX_TO_AIN2   0x03

◆ ADC10_REG3_L1MUX_TO_AIN3

#define ADC10_REG3_L1MUX_TO_AIN3   0x04

◆ ADC10_REG3_L1MUX_TO_REFN

#define ADC10_REG3_L1MUX_TO_REFN   0x06

◆ ADC10_REG3_L1MUX_TO_REFP

#define ADC10_REG3_L1MUX_TO_REFP   0x05

◆ ADC10_REG3_L2MUX_DISABLED

#define ADC10_REG3_L2MUX_DISABLED   0x00

ADC 10 Configuration Register 3 description setting.

Specified IDAC2 routing configuration for description of ADC 10 Click driver.

◆ ADC10_REG3_L2MUX_TO_AIN0

#define ADC10_REG3_L2MUX_TO_AIN0   0x01

◆ ADC10_REG3_L2MUX_TO_AIN1

#define ADC10_REG3_L2MUX_TO_AIN1   0x02

◆ ADC10_REG3_L2MUX_TO_AIN2

#define ADC10_REG3_L2MUX_TO_AIN2   0x03

◆ ADC10_REG3_L2MUX_TO_AIN3

#define ADC10_REG3_L2MUX_TO_AIN3   0x04

◆ ADC10_REG3_L2MUX_TO_REFN

#define ADC10_REG3_L2MUX_TO_REFN   0x06

◆ ADC10_REG3_L2MUX_TO_REFP

#define ADC10_REG3_L2MUX_TO_REFP   0x05

◆ ADC10_REG4_GPIO0_DIR_INPUT

#define ADC10_REG4_GPIO0_DIR_INPUT   0x00

◆ ADC10_REG4_GPIO0_DIR_OUTPUT

#define ADC10_REG4_GPIO0_DIR_OUTPUT   0x01

◆ ADC10_REG4_GPIO1_DIR_INPUT

#define ADC10_REG4_GPIO1_DIR_INPUT   0x00

◆ ADC10_REG4_GPIO1_DIR_OUTPUT

#define ADC10_REG4_GPIO1_DIR_OUTPUT   0x01

◆ ADC10_REG4_GPIO2_DIR_INPUT

#define ADC10_REG4_GPIO2_DIR_INPUT   0x00

ADC 10 Configuration Register 4 description setting.

Specified GPIO direction control for description of ADC 10 Click driver.

◆ ADC10_REG4_GPIO2_DIR_OUTPUT

#define ADC10_REG4_GPIO2_DIR_OUTPUT   0x01

◆ ADC10_REG4_GPIO2_SEL_DAT

#define ADC10_REG4_GPIO2_SEL_DAT   0x00

ADC 10 Configuration Register 4 description setting.

Specified GPIO2/DRDY control for description of ADC 10 Click driver.

◆ ADC10_REG4_GPIO2_SEL_DRDY

#define ADC10_REG4_GPIO2_SEL_DRDY   0x01

◆ ADC10_REG4_GPIO_HIGH

#define ADC10_REG4_GPIO_HIGH   0x01

◆ ADC10_REG4_GPIO_LOW

#define ADC10_REG4_GPIO_LOW   0x00

ADC 10 Configuration Register 4 description setting.

Specified GPIO control for description of ADC 10 Click driver.

◆ ADC10_REG_BITS

#define ADC10_REG_BITS   0x0E

ADC 10 Configuration Vref and resolution setting.

Specified Vref and resolution of ADC 10 Click driver.

◆ ADC10_SYNC_WORD

#define ADC10_SYNC_WORD   0x55

ADC 10 commands description setting.

Specified commands setting for description of ADC 10 Click driver.

◆ ADC10_VREF_EXTERNAL_3300_mA

#define ADC10_VREF_EXTERNAL_3300_mA   3300.0

◆ ADC10_VREF_EXTERNAL_5000_mA

#define ADC10_VREF_EXTERNAL_5000_mA   5000.0

◆ ADC10_VREF_INTERNAL

#define ADC10_VREF_INTERNAL   2048.0

◆ DRV_BUFFER_SIZE

#define DRV_BUFFER_SIZE   200

ADC 10 driver buffer size.

Specified size of driver ring buffer.

Note
Increase buffer size if needed.