List of registers of ADC 16 Click driver. More...

Macros
#define	ADC16_OPCODE_SINGLE_READ 0x10
	ADC 16 Opcodes for Commands.

#define	ADC16_OPCODE_SINGLE_WRITE 0x08

#define	ADC16_OPCODE_SET_BIT 0x18

#define	ADC16_OPCODE_CLEAR_BIT 0x20

#define	ADC16_OPCODE_CONTINUOUS_READ 0x30

#define	ADC16_OPCODE_CONTINUOUS_WRITE 0x28

#define	ADC16_REG_OPMODE_I2CMODE_STATUS 0x00
	ADC 16 Register Map.

#define	ADC16_REG_DATA_BUFFER_STATUS 0x01

#define	ADC16_REG_ACCUMULATOR_STATUS 0x02

#define	ADC16_REG_ALERT_TRIG_CHID 0x03

#define	ADC16_REG_SEQUENCE_STATUS 0x04

#define	ADC16_REG_ACC_CH0_LSB 0x08

#define	ADC16_REG_ACC_CH0_MSB 0x09

#define	ADC16_REG_ACC_CH1_LSB 0x0A

#define	ADC16_REG_ACC_CH1_MSB 0x0B

#define	ADC16_REG_ALERT_LOW_FLAGS 0x0C

#define	ADC16_REG_ALERT_HIGH_FLAGS 0x0E

#define	ADC16_REG_DEVICE_RESET 0x14

#define	ADC16_REG_OFFSET_CAL 0x15

#define	ADC16_REG_WKEY 0x17

#define	ADC16_REG_OSC_SEL 0x18

#define	ADC16_REG_NCLK_SEL 0x19

#define	ADC16_REG_OPMODE_SEL 0x1C

#define	ADC16_REG_START_SEQUENCE 0x1E

#define	ADC16_REG_ABORT_SEQUENCE 0x1F

#define	ADC16_REG_AUTO_SEQ_CHEN 0x20

#define	ADC16_REG_CH_INPUT_CFG 0x24

#define	ADC16_REG_DOUT_FORMAT_CFG 0x28

#define	ADC16_REG_DATA_BUFFER_OPMODE 0x2C

#define	ADC16_REG_ACC_EN 0x30

#define	ADC16_REG_ALERT_CHEN 0x34

#define	ADC16_REG_PRE_ALT_MAX_EVENT_COUNT 0x36

#define	ADC16_REG_ALERT_DWC_EN 0x37

#define	ADC16_REG_DWC_HTH_CH0_LSB 0x38

#define	ADC16_REG_DWC_HTH_CH0_MSB 0x39

#define	ADC16_REG_DWC_LTH_CH0_LSB 0x3A

#define	ADC16_REG_DWC_LTH_CH0_MSB 0x3B

#define	ADC16_REG_DWC_HTH_CH1_LSB 0x3C

#define	ADC16_REG_DWC_HTH_CH1_MSB 0x3D

#define	ADC16_REG_DWC_LTH_CH1_LSB 0x3E

#define	ADC16_REG_DWC_LTH_CH1_MSB 0x3F

#define	ADC16_REG_DWC_HYS_CH0 0x40

#define	ADC16_REG_DWC_HYS_CH1 0x41

Detailed Description

List of registers of ADC 16 Click driver.

Macro Definition Documentation

◆ ADC16_OPCODE_CLEAR_BIT

#define ADC16_OPCODE_CLEAR_BIT 0x20

◆ ADC16_OPCODE_CONTINUOUS_READ

#define ADC16_OPCODE_CONTINUOUS_READ 0x30

◆ ADC16_OPCODE_CONTINUOUS_WRITE

#define ADC16_OPCODE_CONTINUOUS_WRITE 0x28

◆ ADC16_OPCODE_SET_BIT

#define ADC16_OPCODE_SET_BIT 0x18

◆ ADC16_OPCODE_SINGLE_READ

#define ADC16_OPCODE_SINGLE_READ 0x10

ADC 16 Opcodes for Commands.

Specified Opcodes for Commands of ADC 16 Click driver.

◆ ADC16_OPCODE_SINGLE_WRITE

#define ADC16_OPCODE_SINGLE_WRITE 0x08

◆ ADC16_REG_ABORT_SEQUENCE

#define ADC16_REG_ABORT_SEQUENCE 0x1F

◆ ADC16_REG_ACC_CH0_LSB

#define ADC16_REG_ACC_CH0_LSB 0x08

◆ ADC16_REG_ACC_CH0_MSB

#define ADC16_REG_ACC_CH0_MSB 0x09

◆ ADC16_REG_ACC_CH1_LSB

#define ADC16_REG_ACC_CH1_LSB 0x0A

◆ ADC16_REG_ACC_CH1_MSB

#define ADC16_REG_ACC_CH1_MSB 0x0B

◆ ADC16_REG_ACC_EN

#define ADC16_REG_ACC_EN 0x30

◆ ADC16_REG_ACCUMULATOR_STATUS

#define ADC16_REG_ACCUMULATOR_STATUS 0x02

◆ ADC16_REG_ALERT_CHEN

#define ADC16_REG_ALERT_CHEN 0x34

◆ ADC16_REG_ALERT_DWC_EN

#define ADC16_REG_ALERT_DWC_EN 0x37

◆ ADC16_REG_ALERT_HIGH_FLAGS

#define ADC16_REG_ALERT_HIGH_FLAGS 0x0E

◆ ADC16_REG_ALERT_LOW_FLAGS

#define ADC16_REG_ALERT_LOW_FLAGS 0x0C

◆ ADC16_REG_ALERT_TRIG_CHID

#define ADC16_REG_ALERT_TRIG_CHID 0x03

◆ ADC16_REG_AUTO_SEQ_CHEN

#define ADC16_REG_AUTO_SEQ_CHEN 0x20

◆ ADC16_REG_CH_INPUT_CFG

#define ADC16_REG_CH_INPUT_CFG 0x24

◆ ADC16_REG_DATA_BUFFER_OPMODE

#define ADC16_REG_DATA_BUFFER_OPMODE 0x2C

◆ ADC16_REG_DATA_BUFFER_STATUS

#define ADC16_REG_DATA_BUFFER_STATUS 0x01

◆ ADC16_REG_DEVICE_RESET

#define ADC16_REG_DEVICE_RESET 0x14

◆ ADC16_REG_DOUT_FORMAT_CFG

#define ADC16_REG_DOUT_FORMAT_CFG 0x28

◆ ADC16_REG_DWC_HTH_CH0_LSB

#define ADC16_REG_DWC_HTH_CH0_LSB 0x38

◆ ADC16_REG_DWC_HTH_CH0_MSB

#define ADC16_REG_DWC_HTH_CH0_MSB 0x39

◆ ADC16_REG_DWC_HTH_CH1_LSB

#define ADC16_REG_DWC_HTH_CH1_LSB 0x3C

◆ ADC16_REG_DWC_HTH_CH1_MSB

#define ADC16_REG_DWC_HTH_CH1_MSB 0x3D

◆ ADC16_REG_DWC_HYS_CH0

#define ADC16_REG_DWC_HYS_CH0 0x40

◆ ADC16_REG_DWC_HYS_CH1

#define ADC16_REG_DWC_HYS_CH1 0x41

◆ ADC16_REG_DWC_LTH_CH0_LSB

#define ADC16_REG_DWC_LTH_CH0_LSB 0x3A

◆ ADC16_REG_DWC_LTH_CH0_MSB

#define ADC16_REG_DWC_LTH_CH0_MSB 0x3B

◆ ADC16_REG_DWC_LTH_CH1_LSB

#define ADC16_REG_DWC_LTH_CH1_LSB 0x3E

◆ ADC16_REG_DWC_LTH_CH1_MSB

#define ADC16_REG_DWC_LTH_CH1_MSB 0x3F

◆ ADC16_REG_NCLK_SEL

#define ADC16_REG_NCLK_SEL 0x19

◆ ADC16_REG_OFFSET_CAL

#define ADC16_REG_OFFSET_CAL 0x15

◆ ADC16_REG_OPMODE_I2CMODE_STATUS

#define ADC16_REG_OPMODE_I2CMODE_STATUS 0x00

ADC 16 Register Map.

Specified Register Map of ADC 16 Click driver.

◆ ADC16_REG_OPMODE_SEL

#define ADC16_REG_OPMODE_SEL 0x1C

◆ ADC16_REG_OSC_SEL

#define ADC16_REG_OSC_SEL 0x18

◆ ADC16_REG_PRE_ALT_MAX_EVENT_COUNT

#define ADC16_REG_PRE_ALT_MAX_EVENT_COUNT 0x36

◆ ADC16_REG_SEQUENCE_STATUS

#define ADC16_REG_SEQUENCE_STATUS 0x04

◆ ADC16_REG_START_SEQUENCE

#define ADC16_REG_START_SEQUENCE 0x1E

◆ ADC16_REG_WKEY

#define ADC16_REG_WKEY 0x17

Macros