Settings for registers of ADC 18 Click driver. More...

Macros
#define	ADC18_PRODUCT_ID 0x18
	ADC 18 description setting.

#define	ADC18_GEN_CNFG_CRC_EN 0x800000ul
	ADC 18 SPI CRC enable values.

#define	ADC18_DATA_RESOLUTION 0x7FFFFFul
	ADC 18 voltage calculation values.

#define	ADC18_FULL_SCALE_VOLTAGE 12.5

#define	ADC18_START_CONVERSION 0x30
	ADC 18 DCHNL_CMD register settings.

#define	ADC18_STOP_CONVERSION 0x10

#define	ADC18_DATA_RATE_5_SPS 0x00

#define	ADC18_DATA_RATE_10_SPS 0x01

#define	ADC18_DATA_RATE_15_SPS 0x02

#define	ADC18_DATA_RATE_30_SPS 0x03

#define	ADC18_DATA_RATE_50_SPS 0x04

#define	ADC18_DATA_RATE_60_SPS 0x05

#define	ADC18_DATA_RATE_225_SPS 0x06

#define	ADC18_DATA_RATE_450_SPS 0x07

#define	ADC18_DATA_RATE_900_SPS 0x08

#define	ADC18_DATA_RATE_1800_SPS 0x09

#define	ADC18_DATA_RATE_3600_SPS 0x0A

#define	ADC18_DATA_RATE_7200_SPS 0x0B

#define	ADC18_DATA_RATE_14400_SPS 0x0C

#define	ADC18_DATA_RATE_28800_SPS 0x0D

#define	ADC18_DATA_RATE_57600_SPS 0x0E

#define	ADC18_DATA_RATE_115200_SPS 0x0F

#define	ADC18_PD_STATE_STANDBY 0x00
	ADC 18 DCHNL_CTRL1 register settings.

#define	ADC18_PD_STATE_RESET 0x10

#define	ADC18_CONV_MODE_CONTINUOUS 0x00

#define	ADC18_CONV_MODE_SINGLE_CYCLE 0x02

#define	ADC18_CONV_MODE_CONT_SINGLE_CYCLE 0x03

#define	ADC18_CH_AI1_SINGLE_ENDED 0x00
	ADC 18 channel selection values.

#define	ADC18_CH_AI2_SINGLE_ENDED 0x01

#define	ADC18_CH_AI3_SINGLE_ENDED 0x02

#define	ADC18_CH_AI4_SINGLE_ENDED 0x03

#define	ADC18_CH_AI5_SINGLE_ENDED 0x04

#define	ADC18_CH_AI6_SINGLE_ENDED 0x05

#define	ADC18_CH_AI7_SINGLE_ENDED 0x06

#define	ADC18_CH_AI8_SINGLE_ENDED 0x07

#define	ADC18_CH_AI9_SINGLE_ENDED 0x08

#define	ADC18_CH_AI10_SINGLE_ENDED 0x09

#define	ADC18_CH_AI11_SINGLE_ENDED 0x0A

#define	ADC18_CH_AI12_SINGLE_ENDED 0x0B

#define	ADC18_CH_AI1_AI2_DIFFERENTIAL 0x0C

#define	ADC18_CH_AI3_AI4_DIFFERENTIAL 0x0D

#define	ADC18_CH_AI5_AI6_DIFFERENTIAL 0x0E

#define	ADC18_CH_AI7_AI8_DIFFERENTIAL 0x0F

#define	ADC18_CH_AI9_AI10_DIFFERENTIAL 0x10

#define	ADC18_CH_AI11_AI12_DIFFERENTIAL 0x11

#define	ADC18_CH_AI1_COM_AI2_MULTI_DIFF 0x12

#define	ADC18_CH_AI1_COM_AI3_MULTI_DIFF 0x13

#define	ADC18_CH_AI4_COM_AI5_MULTI_DIFF 0x14

#define	ADC18_CH_AI4_COM_AI6_MULTI_DIFF 0x15

#define	ADC18_CH_AI7_COM_AI8_MULTI_DIFF 0x16

#define	ADC18_CH_AI7_COM_AI9_MULTI_DIFF 0x17

#define	ADC18_CH_AI10_COM_AI11_MULTI_DIFF 0x18

#define	ADC18_CH_AI10_COM_AI12_MULTI_DIFF 0x19

#define	ADC18_AIP_TEST_DISABLED 0x00

#define	ADC18_AIP_TEST_2MOHM_TO_AGND 0x40

#define	ADC18_AIP_TEST_2MOHM_TO_HVDD 0x80

#define	ADC18_AIP_TEST_2MOHM_TO_HVDD_AGND 0xC0

#define	ADC18_AIN_TEST_DISABLED 0x00

#define	ADC18_AIN_TEST_2MOHM_TO_AGND 0x10

#define	ADC18_AIN_TEST_2MOHM_TO_HVDD 0x20

#define	ADC18_AIN_TEST_2MOHM_TO_HVDD_AGND 0x30

#define	ADC18_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.

#define	ADC18_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of ADC 18 Click driver.

Macro Definition Documentation

◆ ADC18_AIN_TEST_2MOHM_TO_AGND

#define ADC18_AIN_TEST_2MOHM_TO_AGND 0x10

◆ ADC18_AIN_TEST_2MOHM_TO_HVDD

#define ADC18_AIN_TEST_2MOHM_TO_HVDD 0x20

◆ ADC18_AIN_TEST_2MOHM_TO_HVDD_AGND

#define ADC18_AIN_TEST_2MOHM_TO_HVDD_AGND 0x30

◆ ADC18_AIN_TEST_DISABLED

#define ADC18_AIN_TEST_DISABLED 0x00

◆ ADC18_AIP_TEST_2MOHM_TO_AGND

#define ADC18_AIP_TEST_2MOHM_TO_AGND 0x40

◆ ADC18_AIP_TEST_2MOHM_TO_HVDD

#define ADC18_AIP_TEST_2MOHM_TO_HVDD 0x80

◆ ADC18_AIP_TEST_2MOHM_TO_HVDD_AGND

#define ADC18_AIP_TEST_2MOHM_TO_HVDD_AGND 0xC0

◆ ADC18_AIP_TEST_DISABLED

#define ADC18_AIP_TEST_DISABLED 0x00

◆ ADC18_CH_AI10_COM_AI11_MULTI_DIFF

#define ADC18_CH_AI10_COM_AI11_MULTI_DIFF 0x18

◆ ADC18_CH_AI10_COM_AI12_MULTI_DIFF

#define ADC18_CH_AI10_COM_AI12_MULTI_DIFF 0x19

◆ ADC18_CH_AI10_SINGLE_ENDED

#define ADC18_CH_AI10_SINGLE_ENDED 0x09

◆ ADC18_CH_AI11_AI12_DIFFERENTIAL

#define ADC18_CH_AI11_AI12_DIFFERENTIAL 0x11

◆ ADC18_CH_AI11_SINGLE_ENDED

#define ADC18_CH_AI11_SINGLE_ENDED 0x0A

◆ ADC18_CH_AI12_SINGLE_ENDED

#define ADC18_CH_AI12_SINGLE_ENDED 0x0B

◆ ADC18_CH_AI1_AI2_DIFFERENTIAL

#define ADC18_CH_AI1_AI2_DIFFERENTIAL 0x0C

◆ ADC18_CH_AI1_COM_AI2_MULTI_DIFF

#define ADC18_CH_AI1_COM_AI2_MULTI_DIFF 0x12

◆ ADC18_CH_AI1_COM_AI3_MULTI_DIFF

#define ADC18_CH_AI1_COM_AI3_MULTI_DIFF 0x13

◆ ADC18_CH_AI1_SINGLE_ENDED

#define ADC18_CH_AI1_SINGLE_ENDED 0x00

ADC 18 channel selection values.

Specified channel selection values of ADC 18 Click driver.

◆ ADC18_CH_AI2_SINGLE_ENDED

#define ADC18_CH_AI2_SINGLE_ENDED 0x01

◆ ADC18_CH_AI3_AI4_DIFFERENTIAL

#define ADC18_CH_AI3_AI4_DIFFERENTIAL 0x0D

◆ ADC18_CH_AI3_SINGLE_ENDED

#define ADC18_CH_AI3_SINGLE_ENDED 0x02

◆ ADC18_CH_AI4_COM_AI5_MULTI_DIFF

#define ADC18_CH_AI4_COM_AI5_MULTI_DIFF 0x14

◆ ADC18_CH_AI4_COM_AI6_MULTI_DIFF

#define ADC18_CH_AI4_COM_AI6_MULTI_DIFF 0x15

◆ ADC18_CH_AI4_SINGLE_ENDED

#define ADC18_CH_AI4_SINGLE_ENDED 0x03

◆ ADC18_CH_AI5_AI6_DIFFERENTIAL

#define ADC18_CH_AI5_AI6_DIFFERENTIAL 0x0E

◆ ADC18_CH_AI5_SINGLE_ENDED

#define ADC18_CH_AI5_SINGLE_ENDED 0x04

◆ ADC18_CH_AI6_SINGLE_ENDED

#define ADC18_CH_AI6_SINGLE_ENDED 0x05

◆ ADC18_CH_AI7_AI8_DIFFERENTIAL

#define ADC18_CH_AI7_AI8_DIFFERENTIAL 0x0F

◆ ADC18_CH_AI7_COM_AI8_MULTI_DIFF

#define ADC18_CH_AI7_COM_AI8_MULTI_DIFF 0x16

◆ ADC18_CH_AI7_COM_AI9_MULTI_DIFF

#define ADC18_CH_AI7_COM_AI9_MULTI_DIFF 0x17

◆ ADC18_CH_AI7_SINGLE_ENDED

#define ADC18_CH_AI7_SINGLE_ENDED 0x06

◆ ADC18_CH_AI8_SINGLE_ENDED

#define ADC18_CH_AI8_SINGLE_ENDED 0x07

◆ ADC18_CH_AI9_AI10_DIFFERENTIAL

#define ADC18_CH_AI9_AI10_DIFFERENTIAL 0x10

◆ ADC18_CH_AI9_SINGLE_ENDED

#define ADC18_CH_AI9_SINGLE_ENDED 0x08

◆ ADC18_CONV_MODE_CONT_SINGLE_CYCLE

#define ADC18_CONV_MODE_CONT_SINGLE_CYCLE 0x03

◆ ADC18_CONV_MODE_CONTINUOUS

#define ADC18_CONV_MODE_CONTINUOUS 0x00

◆ ADC18_CONV_MODE_SINGLE_CYCLE

#define ADC18_CONV_MODE_SINGLE_CYCLE 0x02

◆ ADC18_DATA_RATE_10_SPS

#define ADC18_DATA_RATE_10_SPS 0x01

◆ ADC18_DATA_RATE_115200_SPS

#define ADC18_DATA_RATE_115200_SPS 0x0F

◆ ADC18_DATA_RATE_14400_SPS

#define ADC18_DATA_RATE_14400_SPS 0x0C

◆ ADC18_DATA_RATE_15_SPS

#define ADC18_DATA_RATE_15_SPS 0x02

◆ ADC18_DATA_RATE_1800_SPS

#define ADC18_DATA_RATE_1800_SPS 0x09

◆ ADC18_DATA_RATE_225_SPS

#define ADC18_DATA_RATE_225_SPS 0x06

◆ ADC18_DATA_RATE_28800_SPS

#define ADC18_DATA_RATE_28800_SPS 0x0D

◆ ADC18_DATA_RATE_30_SPS

#define ADC18_DATA_RATE_30_SPS 0x03

◆ ADC18_DATA_RATE_3600_SPS

#define ADC18_DATA_RATE_3600_SPS 0x0A

◆ ADC18_DATA_RATE_450_SPS

#define ADC18_DATA_RATE_450_SPS 0x07

◆ ADC18_DATA_RATE_50_SPS

#define ADC18_DATA_RATE_50_SPS 0x04

◆ ADC18_DATA_RATE_57600_SPS

#define ADC18_DATA_RATE_57600_SPS 0x0E

◆ ADC18_DATA_RATE_5_SPS

#define ADC18_DATA_RATE_5_SPS 0x00

◆ ADC18_DATA_RATE_60_SPS

#define ADC18_DATA_RATE_60_SPS 0x05

◆ ADC18_DATA_RATE_7200_SPS

#define ADC18_DATA_RATE_7200_SPS 0x0B

◆ ADC18_DATA_RATE_900_SPS

#define ADC18_DATA_RATE_900_SPS 0x08

◆ ADC18_DATA_RESOLUTION

#define ADC18_DATA_RESOLUTION 0x7FFFFFul

ADC 18 voltage calculation values.

Specified voltage calculation values of ADC 18 Click driver.

◆ ADC18_FULL_SCALE_VOLTAGE

#define ADC18_FULL_SCALE_VOLTAGE 12.5

◆ ADC18_GEN_CNFG_CRC_EN

#define ADC18_GEN_CNFG_CRC_EN 0x800000ul

ADC 18 SPI CRC enable values.

Specified values for SPI CRC enable of ADC 18 Click driver.

◆ ADC18_PD_STATE_RESET

#define ADC18_PD_STATE_RESET 0x10

◆ ADC18_PD_STATE_STANDBY

#define ADC18_PD_STATE_STANDBY 0x00

ADC 18 DCHNL_CTRL1 register settings.

Specified DCHNL_CTRL1 register settings of ADC 18 Click driver.

◆ ADC18_PRODUCT_ID

#define ADC18_PRODUCT_ID 0x18

ADC 18 description setting.

Specified setting for description of ADC 18 Click driver.

◆ ADC18_SET_DATA_SAMPLE_EDGE

#define ADC18_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note: Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with adc18_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ ADC18_SET_DATA_SAMPLE_MIDDLE

#define ADC18_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

◆ ADC18_START_CONVERSION

#define ADC18_START_CONVERSION 0x30

ADC 18 DCHNL_CMD register settings.

Specified DCHNL_CMD register settings of ADC 18 Click driver.

◆ ADC18_STOP_CONVERSION

#define ADC18_STOP_CONVERSION 0x10

Macros