Ch reg

Macros
#define	ADC4_CH_EN   0x8000
#define	ADC4_CH_SETUP_0   0x0001 << 12
#define	ADC4_CH_SETUP_1   0x0002 << 12
#define	ADC4_CH_SETUP_2   0x0003 << 12
#define	ADC4_CH_SETUP_3   0x0004 << 12
#define	ADC4_CH_SETUP_4   0x0005 << 12
#define	ADC4_CH_SETUP_5   0x0006 << 12
#define	ADC4_CH_SETUP_6   0x0007 << 12
#define	ADC4_CH_SETUP_7   0x0008 << 12
#define	ADC4_CH_AINPOS_0   0x0000 << 5
#define	ADC4_CH_AINPOS_1   0x0001 << 5
#define	ADC4_CH_AINPOS_2   0x0002 << 5
#define	ADC4_CH_AINPOS_3   0x0003 << 5
#define	ADC4_CH_AINPOS_4   0x0004 << 5
#define	ADC4_CH_AINPOS_5   0x0005 << 5
#define	ADC4_CH_AINPOS_6   0x0006 << 5
#define	ADC4_CH_AINPOS_7   0x0007 << 5
#define	ADC4_CH_AINPOS_8   0x0008 << 5
#define	ADC4_CH_AINPOS_9   0x0009 << 5
#define	ADC4_CH_AINPOS_10   0x000A << 5
#define	ADC4_CH_AINPOS_11   0x000B << 5
#define	ADC4_CH_AINPOS_12   0x000C << 5
#define	ADC4_CH_AINPOS_13   0x000D << 5
#define	ADC4_CH_AINPOS_14   0x000E << 5
#define	ADC4_CH_AINPOS_15   0x000F << 5
#define	ADC4_CH_AINPOS_16   0x0010 << 5
#define	ADC4_CH_AINPOS_TEMP_P   0x0011 << 5
#define	ADC4_CH_AINPOS_TEMP_N   0x0012 << 5
#define	ADC4_CH_AINPOS_AV_P   0x0013 << 5
#define	ADC4_CH_AINPOS_AV_N   0x0014 << 5
#define	ADC4_CH_AINPOS_REF_P   0x0015 << 5
#define	ADC4_CH_AINPOS_REF_N   0x0016 << 5
#define	ADC4_CH_AINNEG_0   0x0000
#define	ADC4_CH_AINNEG_1   0x0001
#define	ADC4_CH_AINNEG_2   0x0002
#define	ADC4_CH_AINNEG_3   0x0003
#define	ADC4_CH_AINNEG_4   0x0004
#define	ADC4_CH_AINNEG_5   0x0005
#define	ADC4_CH_AINNEG_6   0x0006
#define	ADC4_CH_AINNEG_7   0x0007
#define	ADC4_CH_AINNEG_8   0x0008
#define	ADC4_CH_AINNEG_9   0x0009
#define	ADC4_CH_AINNEG_10   0x000A
#define	ADC4_CH_AINNEG_11   0x000B
#define	ADC4_CH_AINNEG_12   0x000C
#define	ADC4_CH_AINNEG_13   0x000D
#define	ADC4_CH_AINNEG_14   0x000E
#define	ADC4_CH_AINNEG_15   0x000F
#define	ADC4_CH_AINNEG_16   0x0010
#define	ADC4_CH_AINNEG_TEMP_P   0x0011
#define	ADC4_CH_AINNEG_TEMP_N   0x0012
#define	ADC4_CH_AINNEG_AV_P   0x0013
#define	ADC4_CH_AINNEG_AV_N   0x0014
#define	ADC4_CH_AINNEG_REF_P   0x0015
#define	ADC4_CH_AINNEG_REF_N   0x0016

Detailed Description

Macro Definition Documentation

ADC4_CH_AINNEG_0

#define ADC4_CH_AINNEG_0   0x0000

ADC4_CH_AINNEG_1

#define ADC4_CH_AINNEG_1   0x0001

ADC4_CH_AINNEG_10

#define ADC4_CH_AINNEG_10   0x000A

ADC4_CH_AINNEG_11

#define ADC4_CH_AINNEG_11   0x000B

ADC4_CH_AINNEG_12

#define ADC4_CH_AINNEG_12   0x000C

ADC4_CH_AINNEG_13

#define ADC4_CH_AINNEG_13   0x000D

ADC4_CH_AINNEG_14

#define ADC4_CH_AINNEG_14   0x000E

ADC4_CH_AINNEG_15

#define ADC4_CH_AINNEG_15   0x000F

ADC4_CH_AINNEG_16

#define ADC4_CH_AINNEG_16   0x0010

ADC4_CH_AINNEG_2

#define ADC4_CH_AINNEG_2   0x0002

ADC4_CH_AINNEG_3

#define ADC4_CH_AINNEG_3   0x0003

ADC4_CH_AINNEG_4

#define ADC4_CH_AINNEG_4   0x0004

ADC4_CH_AINNEG_5

#define ADC4_CH_AINNEG_5   0x0005

ADC4_CH_AINNEG_6

#define ADC4_CH_AINNEG_6   0x0006

ADC4_CH_AINNEG_7

#define ADC4_CH_AINNEG_7   0x0007

ADC4_CH_AINNEG_8

#define ADC4_CH_AINNEG_8   0x0008

ADC4_CH_AINNEG_9

#define ADC4_CH_AINNEG_9   0x0009

ADC4_CH_AINNEG_AV_N

#define ADC4_CH_AINNEG_AV_N   0x0014

ADC4_CH_AINNEG_AV_P

#define ADC4_CH_AINNEG_AV_P   0x0013

ADC4_CH_AINNEG_REF_N

#define ADC4_CH_AINNEG_REF_N   0x0016

ADC4_CH_AINNEG_REF_P

#define ADC4_CH_AINNEG_REF_P   0x0015

ADC4_CH_AINNEG_TEMP_N

#define ADC4_CH_AINNEG_TEMP_N   0x0012

ADC4_CH_AINNEG_TEMP_P

#define ADC4_CH_AINNEG_TEMP_P   0x0011

ADC4_CH_AINPOS_0

#define ADC4_CH_AINPOS_0   0x0000 << 5

ADC4_CH_AINPOS_1

#define ADC4_CH_AINPOS_1   0x0001 << 5

ADC4_CH_AINPOS_10

#define ADC4_CH_AINPOS_10   0x000A << 5

ADC4_CH_AINPOS_11

#define ADC4_CH_AINPOS_11   0x000B << 5

ADC4_CH_AINPOS_12

#define ADC4_CH_AINPOS_12   0x000C << 5

ADC4_CH_AINPOS_13

#define ADC4_CH_AINPOS_13   0x000D << 5

ADC4_CH_AINPOS_14

#define ADC4_CH_AINPOS_14   0x000E << 5

ADC4_CH_AINPOS_15

#define ADC4_CH_AINPOS_15   0x000F << 5

ADC4_CH_AINPOS_16

#define ADC4_CH_AINPOS_16   0x0010 << 5

ADC4_CH_AINPOS_2

#define ADC4_CH_AINPOS_2   0x0002 << 5

ADC4_CH_AINPOS_3

#define ADC4_CH_AINPOS_3   0x0003 << 5

ADC4_CH_AINPOS_4

#define ADC4_CH_AINPOS_4   0x0004 << 5

ADC4_CH_AINPOS_5

#define ADC4_CH_AINPOS_5   0x0005 << 5

ADC4_CH_AINPOS_6

#define ADC4_CH_AINPOS_6   0x0006 << 5

ADC4_CH_AINPOS_7

#define ADC4_CH_AINPOS_7   0x0007 << 5

ADC4_CH_AINPOS_8

#define ADC4_CH_AINPOS_8   0x0008 << 5

ADC4_CH_AINPOS_9

#define ADC4_CH_AINPOS_9   0x0009 << 5

ADC4_CH_AINPOS_AV_N

#define ADC4_CH_AINPOS_AV_N   0x0014 << 5

ADC4_CH_AINPOS_AV_P

#define ADC4_CH_AINPOS_AV_P   0x0013 << 5

ADC4_CH_AINPOS_REF_N

#define ADC4_CH_AINPOS_REF_N   0x0016 << 5

ADC4_CH_AINPOS_REF_P

#define ADC4_CH_AINPOS_REF_P   0x0015 << 5

ADC4_CH_AINPOS_TEMP_N

#define ADC4_CH_AINPOS_TEMP_N   0x0012 << 5

ADC4_CH_AINPOS_TEMP_P

#define ADC4_CH_AINPOS_TEMP_P   0x0011 << 5

ADC4_CH_EN

#define ADC4_CH_EN   0x8000

ADC4_CH_SETUP_0

#define ADC4_CH_SETUP_0   0x0001 << 12

ADC4_CH_SETUP_1

#define ADC4_CH_SETUP_1   0x0002 << 12

ADC4_CH_SETUP_2

#define ADC4_CH_SETUP_2   0x0003 << 12

ADC4_CH_SETUP_3

#define ADC4_CH_SETUP_3   0x0004 << 12

ADC4_CH_SETUP_4

#define ADC4_CH_SETUP_4   0x0005 << 12

ADC4_CH_SETUP_5

#define ADC4_CH_SETUP_5   0x0006 << 12

ADC4_CH_SETUP_6

#define ADC4_CH_SETUP_6   0x0007 << 12

ADC4_CH_SETUP_7

#define ADC4_CH_SETUP_7   0x0008 << 12