adc4 2.0.0.0
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#define ADC4_FILCON_EHFFIL_SET2 0x0003 << 8 |
#define ADC4_FILCON_ENHFIL_SET1 0x0002 << 8 |
#define ADC4_FILCON_ENHFIL_SET3 0x0005 << 8 |
#define ADC4_FILCON_ENHFIL_SET4 0x0006 << 8 |
#define ADC4_FILCON_ENHFILEN 0x0001 << 11 |
#define ADC4_FILCON_ODR_10 0x0013 |
#define ADC4_FILCON_ODR_100 0x000E |
#define ADC4_FILCON_ODR_1000 0x000A |
#define ADC4_FILCON_ODR_10000 0x0007 |
#define ADC4_FILCON_ODR_125000 0x0001 |
#define ADC4_FILCON_ODR_15625 0x0006 |
#define ADC4_FILCON_ODR_16_66 0x0012 |
#define ADC4_FILCON_ODR_20 0x0011 |
#define ADC4_FILCON_ODR_200 0x000D |
#define ADC4_FILCON_ODR_2500 0x0009 |
#define ADC4_FILCON_ODR_25000 0x0005 |
#define ADC4_FILCON_ODR_250000 0x0000 |
#define ADC4_FILCON_ODR_31250 0x0004 |
#define ADC4_FILCON_ODR_397_5 0x000C |
#define ADC4_FILCON_ODR_49_96 0x0010 |
#define ADC4_FILCON_ODR_5 0x0014 |
#define ADC4_FILCON_ODR_500 0x000B |
#define ADC4_FILCON_ODR_5000 0x0008 |
#define ADC4_FILCON_ODR_50000 0x0003 |
#define ADC4_FILCON_ODR_59_92 0x000F |
#define ADC4_FILCON_ODR_62500 0x0002 |
#define ADC4_FILCON_ORD_SINC3 0x0003 << 5 |
#define ADC4_FILCON_ORD_SINC5 0x0000 |
#define ADC4_FILCON_SINC_MAP0 0x8000 |