battmon2 2.0.0.0
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List of registers of BATT-MON 2 Click driver. More...
List of registers of BATT-MON 2 Click driver.
#define BATTMON2_REG_AGE 0x07 |
#define BATTMON2_REG_AIN 0x27 |
#define BATTMON2_REG_AT_AV_CAP 0xDF |
#define BATTMON2_REG_AT_AV_SOC 0xDE |
#define BATTMON2_REG_AT_Q_RESIDUAL 0xDC |
#define BATTMON2_REG_AT_RATE 0x04 |
#define BATTMON2_REG_AT_TTE 0xDD |
#define BATTMON2_REG_AV_CAP 0x1F |
#define BATTMON2_REG_AV_SOC 0x0E |
#define BATTMON2_REG_AVG_CURRENT 0x0B |
#define BATTMON2_REG_AVG_POWER 0xB3 |
#define BATTMON2_REG_AVG_TA 0x16 |
#define BATTMON2_REG_AVG_V_CELL 0x19 |
#define BATTMON2_REG_C_G_TEMP_CO 0xB8 |
#define BATTMON2_REG_C_GAIN 0x2E |
#define BATTMON2_REG_C_OFF 0x2F |
#define BATTMON2_REG_C_V_HALF_TIME 0xB7 |
#define BATTMON2_REG_C_V_MIX_CAP 0xB6 |
#define BATTMON2_REG_CONFIG 0x1D |
#define BATTMON2_REG_CONFIG_2 0xBB |
#define BATTMON2_REG_CONVG_CFG 0x49 |
#define BATTMON2_REG_CURRENT 0x0A |
#define BATTMON2_REG_CURVE 0xB9 |
#define BATTMON2_REG_CYCLES 0x17 |
#define BATTMON2_REG_DESIGN_CAP 0x18 |
#define BATTMON2_REG_DEV_NAME 0x21 |
#define BATTMON2_REG_DIE_TEMP 0x34 |
#define BATTMON2_REG_DP_ACC 0x46 |
#define BATTMON2_REG_DQ_ACC 0x45 |
#define BATTMON2_REG_F_STAT 0x3D |
#define BATTMON2_REG_FILTER_CFG 0x29 |
#define BATTMON2_REG_FULL_CAP 0x35 |
#define BATTMON2_REG_FULL_CAP_NOM 0x23 |
#define BATTMON2_REG_FULL_CAP_REP 0x10 |
#define BATTMON2_REG_FULL_SOC_THR 0x13 |
#define BATTMON2_REG_HIB_CFG 0xBA |
#define BATTMON2_REG_I_ALRT_TH 0xB4 |
#define BATTMON2_REG_I_CHG_TERM 0x1E |
#define BATTMON2_REG_ID_USER_MEM_2 0xB2 |
#define BATTMON2_REG_LEARN_CFG 0x28 |
#define BATTMON2_REG_MAX_MIN_CURR 0x1C |
#define BATTMON2_REG_MAX_MIN_TEMP 0x1A |
#define BATTMON2_REG_MAX_MIN_VOLT 0x1B |
#define BATTMON2_REG_MAX_PEAK_POWER 0xD4 |
#define BATTMON2_REG_MIN_SYS_VOLTAGE 0xD8 |
#define BATTMON2_REG_MISC_CFG 0x2B |
#define BATTMON2_REG_MIX_CAP 0x0F |
#define BATTMON2_REG_MIX_SOC 0x0D |
#define BATTMON2_REG_MODEL_CFG 0xDB |
#define BATTMON2_REG_MPP_CURRENT 0xD9 |
#define BATTMON2_REG_PACK_RESISTANCE 0xD6 |
#define BATTMON2_REG_POWER 0xB1 |
#define BATTMON2_REG_Q_RESIDUAL 0x0C |
#define BATTMON2_REG_QH 0x4D |
#define BATTMON2_REG_QR_TABLE_00 0x12 |
#define BATTMON2_REG_QR_TABLE_10 0x22 |
#define BATTMON2_REG_QR_TABLE_20 0x32 |
#define BATTMON2_REG_QR_TABLE_30 0x42 |
#define BATTMON2_REG_R_CELL 0x14 |
#define BATTMON2_REG_R_COMP_0 0x38 |
#define BATTMON2_REG_R_GAIN 0x43 |
#define BATTMON2_REG_R_SENSE_USER_MEM_3 0xD0 |
#define BATTMON2_REG_RELAX_CFG 0x2A |
#define BATTMON2_REG_REP_CAP 0x05 |
#define BATTMON2_REG_REP_SOC 0x06 |
#define BATTMON2_REG_RIPPLE_CFG 0xBD |
#define BATTMON2_REG_S_ALRT_TH 0x03 |
#define BATTMON2_REG_SC_OCV_LIM 0xD1 |
#define BATTMON2_REG_SHDN_TIMER 0x3F |
#define BATTMON2_REG_SOC_HOLD 0xD3 |
#define BATTMON2_REG_SOFT_WAKEUP 0x60 |
#define BATTMON2_REG_SPP_CURRENT 0xDA |
#define BATTMON2_REG_STATUS 0x00 |
BATT-MON 2 Register Map.
Specified register map of BATT-MON 2 Click driver.
#define BATTMON2_REG_STATUS_2 0xB0 |
#define BATTMON2_REG_SUS_PEAK_POWER 0xD5 |
#define BATTMON2_REG_SYS_RESISTANCE 0xD7 |
#define BATTMON2_REG_T_ALRT_TH 0x02 |
#define BATTMON2_REG_T_GAIN 0x2C |
#define BATTMON2_REG_T_OFF 0x2D |
#define BATTMON2_REG_TEMP 0x08 |
#define BATTMON2_REG_TEMP_CO 0x39 |
#define BATTMON2_REG_TIMER 0x3E |
#define BATTMON2_REG_TIMER_H 0xBE |
#define BATTMON2_REG_TTE 0x11 |
#define BATTMON2_REG_TTF 0x20 |
#define BATTMON2_REG_TTF_CFG 0xB5 |
#define BATTMON2_REG_V_ALRT_TH 0x01 |
#define BATTMON2_REG_V_CELL 0x09 |
#define BATTMON2_REG_V_EMPTY 0x3A |
#define BATTMON2_REG_V_F_REM_CAP 0x4A |
#define BATTMON2_REG_V_GAIN 0xD2 |
#define BATTMON2_REG_V_RIPPLE 0xBC |