c3dhall2 2.0.0.0
Mode 1 settings

Macros

#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_0   0x00
 
#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_1   0x20
 
#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_2   0x40
 
#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_3   0x60
 
#define C3DHALL2_M1_INTERRUPT_ENABLE   0x04
 
#define C3DHALL2_M1_INTERRUPT_DISABLE   0x00
 
#define C3DHALL2_M1_FAST_MODE_ENABLE   0x02
 
#define C3DHALL2_M1_FAST_MODE_DISABLE   0x00
 
#define C3DHALL2_M1_LOW_POWER_MODE_ENABLE   0x01
 
#define C3DHALL2_M1_LOW_POWER_MODE_DISABLE   0x00
 

Detailed Description

Macro Definition Documentation

◆ C3DHALL2_M1_FAST_MODE_DISABLE

#define C3DHALL2_M1_FAST_MODE_DISABLE   0x00

◆ C3DHALL2_M1_FAST_MODE_ENABLE

#define C3DHALL2_M1_FAST_MODE_ENABLE   0x02

◆ C3DHALL2_M1_I2C_SLAVE_ADDRESS_0

#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_0   0x00

◆ C3DHALL2_M1_I2C_SLAVE_ADDRESS_1

#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_1   0x20

◆ C3DHALL2_M1_I2C_SLAVE_ADDRESS_2

#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_2   0x40

◆ C3DHALL2_M1_I2C_SLAVE_ADDRESS_3

#define C3DHALL2_M1_I2C_SLAVE_ADDRESS_3   0x60

◆ C3DHALL2_M1_INTERRUPT_DISABLE

#define C3DHALL2_M1_INTERRUPT_DISABLE   0x00

◆ C3DHALL2_M1_INTERRUPT_ENABLE

#define C3DHALL2_M1_INTERRUPT_ENABLE   0x04

◆ C3DHALL2_M1_LOW_POWER_MODE_DISABLE

#define C3DHALL2_M1_LOW_POWER_MODE_DISABLE   0x00

◆ C3DHALL2_M1_LOW_POWER_MODE_ENABLE

#define C3DHALL2_M1_LOW_POWER_MODE_ENABLE   0x01