c3dhall3 2.0.0.0
CFG-B Register bits

Macros

#define C3DHALL3_CFGB_OFFSET_CANCELLATION_SINGLE_MODE   0x10
 
#define C3DHALL3_CFGB_INT_ON_DATAOFF   0x08
 
#define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_EVERY_63_ODR   0x00
 
#define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_AFTER_PD   0x04
 
#define C3DHALL3_CFGB_OFFSET_CANCELLATION   0x02
 
#define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_2   0x00
 
#define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_4   0x01
 

Detailed Description

Macro Definition Documentation

◆ C3DHALL3_CFGB_INT_ON_DATAOFF

#define C3DHALL3_CFGB_INT_ON_DATAOFF   0x08

◆ C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_2

#define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_2   0x00

◆ C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_4

#define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_4   0x01

◆ C3DHALL3_CFGB_OFFSET_CANCELLATION

#define C3DHALL3_CFGB_OFFSET_CANCELLATION   0x02

◆ C3DHALL3_CFGB_OFFSET_CANCELLATION_SINGLE_MODE

#define C3DHALL3_CFGB_OFFSET_CANCELLATION_SINGLE_MODE   0x10

◆ C3DHALL3_CFGB_SET_PULSE_FREQUENCY_AFTER_PD

#define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_AFTER_PD   0x04

◆ C3DHALL3_CFGB_SET_PULSE_FREQUENCY_EVERY_63_ODR

#define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_EVERY_63_ODR   0x00