c3dhall3 2.0.0.0
CFG-C Register bits

Macros

#define C3DHALL3_CFGC_INTERRUPT_ON_INT   0x40
 
#define C3DHALL3_CFGC_I2C_DISABLE   0x20
 
#define C3DHALL3_CFGC_ASYNC_DATA_READ   0x10
 
#define C3DHALL3_CFGC_DATA_INVERT   0x08
 
#define C3DHALL3_CFGC_SELF_TEST   0x02
 
#define C3DHALL3_CFGC_DATA_READY_ON_INT   0x01
 

Detailed Description

Macro Definition Documentation

◆ C3DHALL3_CFGC_ASYNC_DATA_READ

#define C3DHALL3_CFGC_ASYNC_DATA_READ   0x10

◆ C3DHALL3_CFGC_DATA_INVERT

#define C3DHALL3_CFGC_DATA_INVERT   0x08

◆ C3DHALL3_CFGC_DATA_READY_ON_INT

#define C3DHALL3_CFGC_DATA_READY_ON_INT   0x01

◆ C3DHALL3_CFGC_I2C_DISABLE

#define C3DHALL3_CFGC_I2C_DISABLE   0x20

◆ C3DHALL3_CFGC_INTERRUPT_ON_INT

#define C3DHALL3_CFGC_INTERRUPT_ON_INT   0x40

◆ C3DHALL3_CFGC_SELF_TEST

#define C3DHALL3_CFGC_SELF_TEST   0x02