c3dhall3 2.0.0.0
Register Addresses

Macros

#define C3DHALL3_OFFSET_X_REG_L   0x45
 
#define C3DHALL3_OFFSET_Y_REG_L   0x47
 
#define C3DHALL3_OFFSET_Z_REG_L   0x49
 
#define C3DHALL3_INT_CRTL   0x63
 
#define C3DHALL3_INT_SOURCE   0x64
 
#define C3DHALL3_INT_THS_L   0x65
 
#define C3DHALL3_STATUS   0x67
 
#define C3DHALL3_OUTX_L   0x68
 
#define C3DHALL3_OUTY_L   0x6A
 
#define C3DHALL3_OUTZ_L   0x6C
 
#define C3DHALL3_CONFIGURATION_REGISTER_A   0x60
 
#define C3DHALL3_CONFIGURATION_REGISTER_B   0x61
 
#define C3DHALL3_CONFIGURATION_REGISTER_C   0x62
 
#define C3DHALL3_INTERRUPT_CONTROL   0x63
 
#define C3DHALL3_TEMPERATURE_L   0x6E
 
#define C3DHALL3_TEMPERATURE_H   0x6F
 

Detailed Description

Macro Definition Documentation

◆ C3DHALL3_CONFIGURATION_REGISTER_A

#define C3DHALL3_CONFIGURATION_REGISTER_A   0x60

◆ C3DHALL3_CONFIGURATION_REGISTER_B

#define C3DHALL3_CONFIGURATION_REGISTER_B   0x61

◆ C3DHALL3_CONFIGURATION_REGISTER_C

#define C3DHALL3_CONFIGURATION_REGISTER_C   0x62

◆ C3DHALL3_INT_CRTL

#define C3DHALL3_INT_CRTL   0x63

◆ C3DHALL3_INT_SOURCE

#define C3DHALL3_INT_SOURCE   0x64

◆ C3DHALL3_INT_THS_L

#define C3DHALL3_INT_THS_L   0x65

◆ C3DHALL3_INTERRUPT_CONTROL

#define C3DHALL3_INTERRUPT_CONTROL   0x63

◆ C3DHALL3_OFFSET_X_REG_L

#define C3DHALL3_OFFSET_X_REG_L   0x45

◆ C3DHALL3_OFFSET_Y_REG_L

#define C3DHALL3_OFFSET_Y_REG_L   0x47

◆ C3DHALL3_OFFSET_Z_REG_L

#define C3DHALL3_OFFSET_Z_REG_L   0x49

◆ C3DHALL3_OUTX_L

#define C3DHALL3_OUTX_L   0x68

◆ C3DHALL3_OUTY_L

#define C3DHALL3_OUTY_L   0x6A

◆ C3DHALL3_OUTZ_L

#define C3DHALL3_OUTZ_L   0x6C

◆ C3DHALL3_STATUS

#define C3DHALL3_STATUS   0x67

◆ C3DHALL3_TEMPERATURE_H

#define C3DHALL3_TEMPERATURE_H   0x6F

◆ C3DHALL3_TEMPERATURE_L

#define C3DHALL3_TEMPERATURE_L   0x6E