c420mat2 2.1.0.0
4-20mA T 2 Registers Settings

Settings for registers of 4-20mA T 2 Click driver. More...

Macros

#define C420MAT2_CMD_XFER   0x00FF
 4-20mA T 2 description setting.
 
#define C420MAT2_CMD_NOP   0x0000
 
#define C420MAT2_CMD_WR_MODE_DISABLE   0x0000
 
#define C420MAT2_CMD_WR_MODE_ENABLE   0x0001
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_50ms   0x0000
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_100ms   0x0100
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_150ms   0x0200
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_200ms   0x0300
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_250ms   0x0400
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_300ms   0x0500
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_350ms   0x0600
 
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_400ms   0x0700
 
#define C420MAT2_CMD_DIS_RETRY_LOOP_DISABLE   0x0000
 
#define C420MAT2_CMD_DIS_RETRY_LOOP_ENABLE   0x0080
 
#define C420MAT2_CMD_MASK_LOOP_ERR_DISABLE   0x0000
 
#define C420MAT2_CMD_MASK_LOOP_ERR_ENABLE   0x0040
 
#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_DISABLE   0x0000
 
#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_ENABLE   0x0020
 
#define C420MAT2_CMD_MASK_SPI_ERR_DISABLE   0x0000
 
#define C420MAT2_CMD_MASK_SPI_ERR_ENABLE   0x0010
 
#define C420MAT2_CMD_SPI_TIMEOUT_50ms   0x0000
 
#define C420MAT2_CMD_SPI_TIMEOUT_100ms   0x0002
 
#define C420MAT2_CMD_SPI_TIMEOUT_150ms   0x0004
 
#define C420MAT2_CMD_SPI_TIMEOUT_200ms   0x0006
 
#define C420MAT2_CMD_SPI_TIMEOUT_250ms   0x0008
 
#define C420MAT2_CMD_SPI_TIMEOUT_300ms   0x000A
 
#define C420MAT2_CMD_SPI_TIMEOUT_350ms   0x000C
 
#define C420MAT2_CMD_SPI_TIMEOUT_400ms   0x000E
 
#define C420MAT2_CMD_MASK_SPI_TOUT_DISABLE   0x0000
 
#define C420MAT2_CMD_MASK_SPI_TOUT_ENABLE   0x0001
 
#define C420MAT2_CMD_RESET   0xC33C
 
#define C420MAT2_STATUS_DAC_RES_BIT_MASK   0x00E0
 4-20mA T 2 status bitmask.
 
#define C420MAT2_STATUS_ERRLVL_PIN_BIT_MASK   0x0010
 
#define C420MAT2_STATUS_FERR_STS_BIT_MASK   0x0008
 
#define C420MAT2_STATUSSPI_TIMEOUT_ERR_BIT_MASK   0x0004
 
#define C420MAT2_STATUS_LOOP_STS_BIT_MASK   0x0002
 
#define C420MAT2_STATUS_CURR_LOOP_STS_BIT_MASK   0x0001
 
#define C420MAT2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection.
 
#define C420MAT2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 

Detailed Description

Settings for registers of 4-20mA T 2 Click driver.

Macro Definition Documentation

◆ C420MAT2_CMD_DIS_LOOP_ERR_ERRB_DISABLE

#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_DISABLE   0x0000

◆ C420MAT2_CMD_DIS_LOOP_ERR_ERRB_ENABLE

#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_ENABLE   0x0020

◆ C420MAT2_CMD_DIS_RETRY_LOOP_DISABLE

#define C420MAT2_CMD_DIS_RETRY_LOOP_DISABLE   0x0000

◆ C420MAT2_CMD_DIS_RETRY_LOOP_ENABLE

#define C420MAT2_CMD_DIS_RETRY_LOOP_ENABLE   0x0080

◆ C420MAT2_CMD_MASK_LOOP_ERR_DISABLE

#define C420MAT2_CMD_MASK_LOOP_ERR_DISABLE   0x0000

◆ C420MAT2_CMD_MASK_LOOP_ERR_ENABLE

#define C420MAT2_CMD_MASK_LOOP_ERR_ENABLE   0x0040

◆ C420MAT2_CMD_MASK_SPI_ERR_DISABLE

#define C420MAT2_CMD_MASK_SPI_ERR_DISABLE   0x0000

◆ C420MAT2_CMD_MASK_SPI_ERR_ENABLE

#define C420MAT2_CMD_MASK_SPI_ERR_ENABLE   0x0010

◆ C420MAT2_CMD_MASK_SPI_TOUT_DISABLE

#define C420MAT2_CMD_MASK_SPI_TOUT_DISABLE   0x0000

◆ C420MAT2_CMD_MASK_SPI_TOUT_ENABLE

#define C420MAT2_CMD_MASK_SPI_TOUT_ENABLE   0x0001

◆ C420MAT2_CMD_NOP

#define C420MAT2_CMD_NOP   0x0000

◆ C420MAT2_CMD_RESET

#define C420MAT2_CMD_RESET   0xC33C

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_100ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_100ms   0x0100

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_150ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_150ms   0x0200

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_200ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_200ms   0x0300

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_250ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_250ms   0x0400

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_300ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_300ms   0x0500

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_350ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_350ms   0x0600

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_400ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_400ms   0x0700

◆ C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_50ms

#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_50ms   0x0000

◆ C420MAT2_CMD_SPI_TIMEOUT_100ms

#define C420MAT2_CMD_SPI_TIMEOUT_100ms   0x0002

◆ C420MAT2_CMD_SPI_TIMEOUT_150ms

#define C420MAT2_CMD_SPI_TIMEOUT_150ms   0x0004

◆ C420MAT2_CMD_SPI_TIMEOUT_200ms

#define C420MAT2_CMD_SPI_TIMEOUT_200ms   0x0006

◆ C420MAT2_CMD_SPI_TIMEOUT_250ms

#define C420MAT2_CMD_SPI_TIMEOUT_250ms   0x0008

◆ C420MAT2_CMD_SPI_TIMEOUT_300ms

#define C420MAT2_CMD_SPI_TIMEOUT_300ms   0x000A

◆ C420MAT2_CMD_SPI_TIMEOUT_350ms

#define C420MAT2_CMD_SPI_TIMEOUT_350ms   0x000C

◆ C420MAT2_CMD_SPI_TIMEOUT_400ms

#define C420MAT2_CMD_SPI_TIMEOUT_400ms   0x000E

◆ C420MAT2_CMD_SPI_TIMEOUT_50ms

#define C420MAT2_CMD_SPI_TIMEOUT_50ms   0x0000

◆ C420MAT2_CMD_WR_MODE_DISABLE

#define C420MAT2_CMD_WR_MODE_DISABLE   0x0000

◆ C420MAT2_CMD_WR_MODE_ENABLE

#define C420MAT2_CMD_WR_MODE_ENABLE   0x0001

◆ C420MAT2_CMD_XFER

#define C420MAT2_CMD_XFER   0x00FF

4-20mA T 2 description setting.

Specified setting for description of 4-20mA T 2 Click driver.

◆ C420MAT2_SET_DATA_SAMPLE_EDGE

#define C420MAT2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note
Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with c420mat2_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ C420MAT2_SET_DATA_SAMPLE_MIDDLE

#define C420MAT2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

◆ C420MAT2_STATUS_CURR_LOOP_STS_BIT_MASK

#define C420MAT2_STATUS_CURR_LOOP_STS_BIT_MASK   0x0001

◆ C420MAT2_STATUS_DAC_RES_BIT_MASK

#define C420MAT2_STATUS_DAC_RES_BIT_MASK   0x00E0

4-20mA T 2 status bitmask.

Specified setting for status bitmask of 4-20mA T 2 Click driver.

◆ C420MAT2_STATUS_ERRLVL_PIN_BIT_MASK

#define C420MAT2_STATUS_ERRLVL_PIN_BIT_MASK   0x0010

◆ C420MAT2_STATUS_FERR_STS_BIT_MASK

#define C420MAT2_STATUS_FERR_STS_BIT_MASK   0x0008

◆ C420MAT2_STATUS_LOOP_STS_BIT_MASK

#define C420MAT2_STATUS_LOOP_STS_BIT_MASK   0x0002

◆ C420MAT2_STATUSSPI_TIMEOUT_ERR_BIT_MASK

#define C420MAT2_STATUSSPI_TIMEOUT_ERR_BIT_MASK   0x0004