c4gltena.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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#ifndef C4GLTENA_H
#define C4GLTENA_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_uart.h"
 
#define C4GLTENA_CMD_AT          "AT"
#define C4GLTENA_CMD_ATI         "ATI"
#define C4GLTENA_CMD_CGMR        "AT+CGMR"
#define C4GLTENA_CMD_CFUN        "AT+CFUN"
#define C4GLTENA_CMD_CREG        "AT+CREG"
#define C4GLTENA_CMD_CGREG       "AT+CGREG"
#define C4GLTENA_CMD_CGDCONT     "AT+CGDCONT"
#define C4GLTENA_CMD_CIMI        "AT+CIMI"
#define C4GLTENA_CMD_CMEE        "AT+CMEE"
#define C4GLTENA_CMD_CGATT       "AT+CGATT"
#define C4GLTENA_CMD_CSQ         "AT+CSQ"
#define C4GLTENA_CMD_COPS        "AT+COPS"
#define C4GLTENA_CMD_CMGS        "AT+CMGS"
#define C4GLTENA_CMD_CMGF        "AT+CMGF"
#define DRV_RX_BUFFER_SIZE      256
#define DRV_TX_BUFFER_SIZE      256
 
 // c4gltena_set
 
#define C4GLTENA_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.tx_pin  = MIKROBUS( mikrobus, MIKROBUS_TX ); \
    cfg.rx_pin  = MIKROBUS( mikrobus, MIKROBUS_RX ); \
    cfg.sta = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.pwk = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.rts = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.ring = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
    cfg.cts = MIKROBUS( mikrobus, MIKROBUS_INT );
 
 // c4gltena_map
 // c4gltena
 
typedef struct
{
    // Output pins
    digital_out_t pwk;     
    digital_out_t rts;     
 
    // Input pins
    digital_in_t sta;         
    digital_in_t ring;      
    digital_in_t cts;    
 
    // Modules
    uart_t uart;                                    
    // Buffers
    char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];         
    char uart_tx_buffer[ DRV_TX_BUFFER_SIZE ];         
} c4gltena_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t rx_pin;                                  
    pin_name_t tx_pin;                                  
    // Additional gpio pins
    pin_name_t sta;  
    pin_name_t pwk;      
    pin_name_t rts;    
    pin_name_t ring;     
    pin_name_t cts;       
 
    // Static variable
    uint32_t          baud_rate;                        
    bool              uart_blocking;                    
    uart_data_bits_t  data_bit;                         
    uart_parity_t     parity_bit;                       
    uart_stop_bits_t  stop_bit;                         
} c4gltena_cfg_t;
 
typedef enum
{
   C4GLTENA_OK = 0,
   C4GLTENA_ERROR = -1
 
} c4gltena_return_value_t;
 
void c4gltena_cfg_setup ( c4gltena_cfg_t *cfg );
 
err_t c4gltena_init ( c4gltena_t *ctx, c4gltena_cfg_t *cfg );
 
void c4gltena_module_power_on ( c4gltena_t *ctx );
 
err_t c4gltena_generic_write ( c4gltena_t *ctx, char *data_buf, uint16_t len );
 
err_t c4gltena_generic_read ( c4gltena_t *ctx, char *data_buf, uint16_t max_len );
 
void c4gltena_set_rts_pin ( c4gltena_t *ctx, uint8_t state );
 
void c4gltena_set_pwk_pin ( c4gltena_t *ctx, uint8_t state );
 
uint8_t c4gltena_get_cts_pin ( c4gltena_t *ctx );
 
uint8_t c4gltena_get_sta_pin ( c4gltena_t *ctx );
 
uint8_t c4gltena_get_ring_pin ( c4gltena_t *ctx );
 
void c4gltena_send_cmd ( c4gltena_t *ctx, char *cmd );
 
void c4gltena_send_cmd_with_parameter ( c4gltena_t *ctx, char *at_cmd_buf, char *param_buf );
 
void c4gltena_send_cmd_check ( c4gltena_t *ctx, char *at_cmd_buf );
 
void c4gltena_send_cmd_parameter_check ( c4gltena_t *ctx, char *at_cmd_buf );
 
void c4gltena_set_sim_apn ( c4gltena_t *ctx, char *sim_apn );
 
void c4gltena_send_sms_text ( c4gltena_t *ctx, char *phone_number, char *sms_text );
 
err_t c4gltena_send_sms_pdu ( c4gltena_t *ctx, char *service_center_number, char *phone_number, char *sms_text );
 
#ifdef __cplusplus
}
#endif
#endif // C4GLTENA_H
 
 // c4gltena
 
// ------------------------------------------------------------------------ END