CAN FD 6 device register bit field defines.

List of device register bit field defines of CAN FD 6 Click driver. More...

Macros
#define	CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS   0x00000020
#define	CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK   0xC0000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING   0x40000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING   0x80000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES   0xC0000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK   0x30000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS   0x10000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S   0x20000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S   0x30000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK   0x08000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ   0x08000000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK   0x00C00000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0   0x00400000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT   0x00800000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT   0x00C00000
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK   0x00200000
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN   0x00200000
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK   0x00080000
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO   0x00080000
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT   0x00040000
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK   0x00020000
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE   0x00010000
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE   0x00020000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK   0x0000C000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT   0x00004000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI   0x00008000
#define	CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK   0x00002000
#define	CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN   0x00002000
#define	CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK   0x00001000
#define	CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2   0x00001000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK   0x00000C00
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1   0x00000400
#define	CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM   0x00000800
#define	CANFD6_REG_BITS_DEVICE_MODE_INH_MASK   0x00000200
#define	CANFD6_REG_BITS_DEVICE_MODE_INH_DIS   0x00000200
#define	CANFD6_REG_BITS_DEVICE_MODE_INH_EN   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK   0x00000100
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ   0x00000100
#define	CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK   0x000000C0
#define	CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY   0x00000040
#define	CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL   0x00000080
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK   0x00000008
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_EN   0x00000008
#define	CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET   0x00000004
#define	CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK   0x00000002
#define	CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS   0x00000002
#define	CANFD6_REG_BITS_DEVICE_MODE_SWE_EN   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK   0x00000001
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY   0x00000000
#define	CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER   0x00000001

Detailed Description

List of device register bit field defines of CAN FD 6 Click driver.

Macro Definition Documentation

CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1

#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2

#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2   0x00001000

CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK   0x00001000

CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET

#define CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET   0x00000004

CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK   0x000000C0

CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL

#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL   0x00000080

CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP

#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY

#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY   0x00000040

CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN

#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN   0x00002000

CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK   0x00002000

CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS

#define CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS   0x00000020

CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK   0x00000C00

CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1   0x00000400

CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM   0x00000800

CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT   0x00004000

CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI   0x00008000

CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK   0x0000C000

CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT

#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK   0x00C00000

CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0

#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0   0x00400000

CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT

#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT   0x00C00000

CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT

#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT   0x00800000

CANFD6_REG_BITS_DEVICE_MODE_INH_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_INH_DIS   0x00000200

CANFD6_REG_BITS_DEVICE_MODE_INH_EN

#define CANFD6_REG_BITS_DEVICE_MODE_INH_EN   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_INH_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_INH_MASK   0x00000200

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK   0x00000100

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ   0x00000100

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK   0x00080000

CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO

#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO   0x00080000

CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS   0x00000002

CANFD6_REG_BITS_DEVICE_MODE_SWE_EN

#define CANFD6_REG_BITS_DEVICE_MODE_SWE_EN   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK   0x00000002

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER   0x00000001

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN   0x00200000

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK   0x00200000

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK   0x00000001

CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY

#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES

#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES   0xC0000000

CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING

#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING   0x80000000

CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK   0xC0000000

CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING

#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING   0x40000000

CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ

#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ

#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ   0x08000000

CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK   0x08000000

CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S

#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S   0x20000000

CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS

#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS   0x10000000

CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS

#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S

#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S   0x30000000

CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK   0x30000000

CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE   0x00010000

CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK   0x00020000

CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE   0x00020000

CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS   0x00000000

CANFD6_REG_BITS_DEVICE_MODE_WDT_EN

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_EN   0x00000008

CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK   0x00000008

CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT

#define CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT   0x00040000