List of registers of ccRF 3 Click driver. More...

Macros
#define	CCRF3_IOCFG3 0x0000
	ccRF 3 description register.

#define	CCRF3_IOCFG2 0x0001

#define	CCRF3_IOCFG1 0x0002

#define	CCRF3_IOCFG0 0x0003

#define	CCRF3_SYNC3 0x0004

#define	CCRF3_SYNC2 0x0005

#define	CCRF3_SYNC1 0x0006

#define	CCRF3_SYNC0 0x0007

#define	CCRF3_SYNC_CFG1 0x0008

#define	CCRF3_SYNC_CFG0 0x0009

#define	CCRF3_DEVIATION_M 0x000A

#define	CCRF3_MODCFG_DEV_E 0x000B

#define	CCRF3_DCFILT_CFG 0x000C

#define	CCRF3_PREAMBLE_CFG1 0x000D

#define	CCRF3_PREAMBLE_CFG0 0x000E

#define	CCRF3_FREQ_IF_CFG 0x000F

#define	CCRF3_IQIC 0x0010

#define	CCRF3_CHAN_BW 0x0011

#define	CCRF3_MDMCFG1 0x0012

#define	CCRF3_MDMCFG0 0x0013

#define	CCRF3_SYMBOL_RATE2 0x0014

#define	CCRF3_SYMBOL_RATE1 0x0015

#define	CCRF3_SYMBOL_RATE0 0x0016

#define	CCRF3_AGC_REF 0x0017

#define	CCRF3_AGC_CS_THR 0x0018

#define	CCRF3_AGC_GAIN_ADJUST 0x0019

#define	CCRF3_AGC_CFG3 0x001A

#define	CCRF3_AGC_CFG2 0x001B

#define	CCRF3_AGC_CFG1 0x001C

#define	CCRF3_AGC_CFG0 0x001D

#define	CCRF3_FIFO_CFG 0x001E

#define	CCRF3_DEV_ADDR 0x001F

#define	CCRF3_SETTLING_CFG 0x0020

#define	CCRF3_FS_CFG 0x0021

#define	CCRF3_WOR_CFG1 0x0022

#define	CCRF3_WOR_CFG0 0x0023

#define	CCRF3_WOR_EVENT0_MSB 0x0024

#define	CCRF3_WOR_EVENT0_LSB 0x0025

#define	CCRF3_PKT_CFG2 0x0026

#define	CCRF3_PKT_CFG1 0x0027

#define	CCRF3_PKT_CFG0 0x0028

#define	CCRF3_RFEND_CFG1 0x0029

#define	CCRF3_RFEND_CFG0 0x002A

#define	CCRF3_PA_CFG2 0x002B

#define	CCRF3_PA_CFG1 0x002C

#define	CCRF3_PA_CFG0 0x002D

#define	CCRF3_PKT_LEN 0x002E

#define	CCRF3_IF_MIX_CFG 0x2F00
	ccRF 3 Extended configuration register.

#define	CCRF3_FREQOFF_CFG 0x2F01

#define	CCRF3_TOC_CFG 0x2F02

#define	CCRF3_MARC_SPARE 0x2F03

#define	CCRF3_ECG_CFG 0x2F04

#define	CCRF3_CFM_DATA_CFG 0x2F05

#define	CCRF3_EXT_CTRL 0x2F06

#define	CCRF3_RCCAL_FINE 0x2F07

#define	CCRF3_RCCAL_COARSE 0x2F08

#define	CCRF3_RCCAL_OFFSET 0x2F09

#define	CCRF3_FREQOFF1 0x2F0A

#define	CCRF3_FREQOFF0 0x2F0B

#define	CCRF3_FREQ2 0x2F0C

#define	CCRF3_FREQ1 0x2F0D

#define	CCRF3_FREQ0 0x2F0E

#define	CCRF3_IF_ADC2 0x2F0F

#define	CCRF3_IF_ADC1 0x2F10

#define	CCRF3_IF_ADC0 0x2F11

#define	CCRF3_FS_DIG1 0x2F12

#define	CCRF3_FS_DIG0 0x2F13

#define	CCRF3_FS_CAL3 0x2F14

#define	CCRF3_FS_CAL2 0x2F15

#define	CCRF3_FS_CAL1 0x2F16

#define	CCRF3_FS_CAL0 0x2F17

#define	CCRF3_FS_CHP 0x2F18

#define	CCRF3_FS_DIVTWO 0x2F19

#define	CCRF3_FS_DSM1 0x2F1A

#define	CCRF3_FS_DSM0 0x2F1B

#define	CCRF3_FS_DVC1 0x2F1C

#define	CCRF3_FS_DVC0 0x2F1D

#define	CCRF3_FS_LBI 0x2F1E

#define	CCRF3_FS_PFD 0x2F1F

#define	CCRF3_FS_PRE 0x2F20

#define	CCRF3_FS_REG_DIV_CML 0x2F21

#define	CCRF3_FS_SPARE 0x2F22

#define	CCRF3_FS_VCO4 0x2F23

#define	CCRF3_FS_VCO3 0x2F24

#define	CCRF3_FS_VCO2 0x2F25

#define	CCRF3_FS_VCO1 0x2F26

#define	CCRF3_FS_VCO0 0x2F27

#define	CCRF3_GBIAS6 0x2F28

#define	CCRF3_GBIAS5 0x2F29

#define	CCRF3_GBIAS4 0x2F2A

#define	CCRF3_GBIAS3 0x2F2B

#define	CCRF3_GBIAS2 0x2F2C

#define	CCRF3_GBIAS1 0x2F2D

#define	CCRF3_GBIAS0 0x2F2E

#define	CCRF3_IFAMP 0x2F2F

#define	CCRF3_LNA 0x2F30

#define	CCRF3_RXMIX 0x2F31

#define	CCRF3_XOSC5 0x2F32

#define	CCRF3_XOSC4 0x2F33

#define	CCRF3_XOSC3 0x2F34

#define	CCRF3_XOSC2 0x2F35

#define	CCRF3_XOSC1 0x2F36

#define	CCRF3_XOSC0 0x2F37

#define	CCRF3_ANALOG_SPARE 0x2F38

#define	CCRF3_PA_CFG3 0x2F39

#define	CCRF3_IRQ0M 0x2F3F

#define	CCRF3_IRQ0F 0x2F40

#define	CCRF3_WOR_TIME1 0x2F64
	ccRF 3 Status registers.

#define	CCRF3_WOR_TIME0 0x2F65

#define	CCRF3_WOR_CAPTURE1 0x2F66

#define	CCRF3_WOR_CAPTURE0 0x2F67

#define	CCRF3_BIST 0x2F68

#define	CCRF3_DCFILTOFFSET_I1 0x2F69

#define	CCRF3_DCFILTOFFSET_I0 0x2F6A

#define	CCRF3_DCFILTOFFSET_Q1 0x2F6B

#define	CCRF3_DCFILTOFFSET_Q0 0x2F6C

#define	CCRF3_IQIE_I1 0x2F6D

#define	CCRF3_IQIE_I0 0x2F6E

#define	CCRF3_IQIE_Q1 0x2F6F

#define	CCRF3_IQIE_Q0 0x2F70

#define	CCRF3_RSSI1 0x2F71

#define	CCRF3_RSSI0 0x2F72

#define	CCRF3_MARCSTATE 0x2F73

#define	CCRF3_LQI_VAL 0x2F74

#define	CCRF3_PQT_SYNC_ERR 0x2F75

#define	CCRF3_DEM_STATUS 0x2F76

#define	CCRF3_FREQOFF_EST1 0x2F77

#define	CCRF3_FREQOFF_EST0 0x2F78

#define	CCRF3_AGC_GAIN3 0x2F79

#define	CCRF3_AGC_GAIN2 0x2F7A

#define	CCRF3_AGC_GAIN1 0x2F7B

#define	CCRF3_AGC_GAIN0 0x2F7C

#define	CCRF3_CFM_RX_DATA_OUT 0x2F7D

#define	CCRF3_CFM_TX_DATA_IN 0x2F7E

#define	CCRF3_ASK_SOFT_RX_DATA 0x2F7F

#define	CCRF3_RNDGEN 0x2F80

#define	CCRF3_MAGN2 0x2F81

#define	CCRF3_MAGN1 0x2F82

#define	CCRF3_MAGN0 0x2F83

#define	CCRF3_ANG1 0x2F84

#define	CCRF3_ANG0 0x2F85

#define	CCRF3_CHFILT_I2 0x2F86

#define	CCRF3_CHFILT_I1 0x2F87

#define	CCRF3_CHFILT_I0 0x2F88

#define	CCRF3_CHFILT_Q2 0x2F89

#define	CCRF3_CHFILT_Q1 0x2F8A

#define	CCRF3_CHFILT_Q0 0x2F8B

#define	CCRF3_GPIO_STATUS 0x2F8C

#define	CCRF3_FSCAL_CTRL 0x2F8D

#define	CCRF3_PHASE_ADJUST 0x2F8E

#define	CCRF3_PARTNUMBER 0x2F8F

#define	CCRF3_PARTVERSION 0x2F90

#define	CCRF3_SERIAL_STATUS 0x2F91

#define	CCRF3_MODEM_STATUS1 0x2F92

#define	CCRF3_MODEM_STATUS0 0x2F93

#define	CCRF3_MARC_STATUS1 0x2F94

#define	CCRF3_MARC_STATUS0 0x2F95

#define	CCRF3_PA_IFAMP_TEST 0x2F96

#define	CCRF3_FSRF_TEST 0x2F97

#define	CCRF3_PRE_TEST 0x2F98

#define	CCRF3_PRE_OVR 0x2F99

#define	CCRF3_ADC_TEST 0x2F9A

#define	CCRF3_DVC_TEST 0x2F9B

#define	CCRF3_ATEST 0x2F9C

#define	CCRF3_ATEST_LVDS 0x2F9D

#define	CCRF3_ATEST_MODE 0x2F9E

#define	CCRF3_XOSC_TEST1 0x2F9F

#define	CCRF3_XOSC_TEST0 0x2FA0

#define	CCRF3_RXFIRST 0x2FD2

#define	CCRF3_TXFIRST 0x2FD3

#define	CCRF3_RXLAST 0x2FD4

#define	CCRF3_TXLAST 0x2FD5

#define	CCRF3_NUM_TXBYTES 0x2FD6

#define	CCRF3_NUM_RXBYTES 0x2FD7

#define	CCRF3_FIFO_NUM_TXBYTES 0x2FD8

#define	CCRF3_FIFO_NUM_RXBYTES 0x2FD9

Detailed Description

List of registers of ccRF 3 Click driver.

Macro Definition Documentation

◆ CCRF3_ADC_TEST

#define CCRF3_ADC_TEST 0x2F9A

◆ CCRF3_AGC_CFG0

#define CCRF3_AGC_CFG0 0x001D

◆ CCRF3_AGC_CFG1

#define CCRF3_AGC_CFG1 0x001C

◆ CCRF3_AGC_CFG2

#define CCRF3_AGC_CFG2 0x001B

◆ CCRF3_AGC_CFG3

#define CCRF3_AGC_CFG3 0x001A

◆ CCRF3_AGC_CS_THR

#define CCRF3_AGC_CS_THR 0x0018

◆ CCRF3_AGC_GAIN0

#define CCRF3_AGC_GAIN0 0x2F7C

◆ CCRF3_AGC_GAIN1

#define CCRF3_AGC_GAIN1 0x2F7B

◆ CCRF3_AGC_GAIN2

#define CCRF3_AGC_GAIN2 0x2F7A

◆ CCRF3_AGC_GAIN3

#define CCRF3_AGC_GAIN3 0x2F79

◆ CCRF3_AGC_GAIN_ADJUST

#define CCRF3_AGC_GAIN_ADJUST 0x0019

◆ CCRF3_AGC_REF

#define CCRF3_AGC_REF 0x0017

◆ CCRF3_ANALOG_SPARE

#define CCRF3_ANALOG_SPARE 0x2F38

◆ CCRF3_ANG0

#define CCRF3_ANG0 0x2F85

◆ CCRF3_ANG1

#define CCRF3_ANG1 0x2F84

◆ CCRF3_ASK_SOFT_RX_DATA

#define CCRF3_ASK_SOFT_RX_DATA 0x2F7F

◆ CCRF3_ATEST

#define CCRF3_ATEST 0x2F9C

◆ CCRF3_ATEST_LVDS

#define CCRF3_ATEST_LVDS 0x2F9D

◆ CCRF3_ATEST_MODE

#define CCRF3_ATEST_MODE 0x2F9E

◆ CCRF3_BIST

#define CCRF3_BIST 0x2F68

◆ CCRF3_CFM_DATA_CFG

#define CCRF3_CFM_DATA_CFG 0x2F05

◆ CCRF3_CFM_RX_DATA_OUT

#define CCRF3_CFM_RX_DATA_OUT 0x2F7D

◆ CCRF3_CFM_TX_DATA_IN

#define CCRF3_CFM_TX_DATA_IN 0x2F7E

◆ CCRF3_CHAN_BW

#define CCRF3_CHAN_BW 0x0011

◆ CCRF3_CHFILT_I0

#define CCRF3_CHFILT_I0 0x2F88

◆ CCRF3_CHFILT_I1

#define CCRF3_CHFILT_I1 0x2F87

◆ CCRF3_CHFILT_I2

#define CCRF3_CHFILT_I2 0x2F86

◆ CCRF3_CHFILT_Q0

#define CCRF3_CHFILT_Q0 0x2F8B

◆ CCRF3_CHFILT_Q1

#define CCRF3_CHFILT_Q1 0x2F8A

◆ CCRF3_CHFILT_Q2

#define CCRF3_CHFILT_Q2 0x2F89

◆ CCRF3_DCFILT_CFG

#define CCRF3_DCFILT_CFG 0x000C

◆ CCRF3_DCFILTOFFSET_I0

#define CCRF3_DCFILTOFFSET_I0 0x2F6A

◆ CCRF3_DCFILTOFFSET_I1

#define CCRF3_DCFILTOFFSET_I1 0x2F69

◆ CCRF3_DCFILTOFFSET_Q0

#define CCRF3_DCFILTOFFSET_Q0 0x2F6C

◆ CCRF3_DCFILTOFFSET_Q1

#define CCRF3_DCFILTOFFSET_Q1 0x2F6B

◆ CCRF3_DEM_STATUS

#define CCRF3_DEM_STATUS 0x2F76

◆ CCRF3_DEV_ADDR

#define CCRF3_DEV_ADDR 0x001F

◆ CCRF3_DEVIATION_M

#define CCRF3_DEVIATION_M 0x000A

◆ CCRF3_DVC_TEST

#define CCRF3_DVC_TEST 0x2F9B

◆ CCRF3_ECG_CFG

#define CCRF3_ECG_CFG 0x2F04

◆ CCRF3_EXT_CTRL

#define CCRF3_EXT_CTRL 0x2F06

◆ CCRF3_FIFO_CFG

#define CCRF3_FIFO_CFG 0x001E

◆ CCRF3_FIFO_NUM_RXBYTES

#define CCRF3_FIFO_NUM_RXBYTES 0x2FD9

◆ CCRF3_FIFO_NUM_TXBYTES

#define CCRF3_FIFO_NUM_TXBYTES 0x2FD8

◆ CCRF3_FREQ0

#define CCRF3_FREQ0 0x2F0E

◆ CCRF3_FREQ1

#define CCRF3_FREQ1 0x2F0D

◆ CCRF3_FREQ2

#define CCRF3_FREQ2 0x2F0C

◆ CCRF3_FREQ_IF_CFG

#define CCRF3_FREQ_IF_CFG 0x000F

◆ CCRF3_FREQOFF0

#define CCRF3_FREQOFF0 0x2F0B

◆ CCRF3_FREQOFF1

#define CCRF3_FREQOFF1 0x2F0A

◆ CCRF3_FREQOFF_CFG

#define CCRF3_FREQOFF_CFG 0x2F01

◆ CCRF3_FREQOFF_EST0

#define CCRF3_FREQOFF_EST0 0x2F78

◆ CCRF3_FREQOFF_EST1

#define CCRF3_FREQOFF_EST1 0x2F77

◆ CCRF3_FS_CAL0

#define CCRF3_FS_CAL0 0x2F17

◆ CCRF3_FS_CAL1

#define CCRF3_FS_CAL1 0x2F16

◆ CCRF3_FS_CAL2

#define CCRF3_FS_CAL2 0x2F15

◆ CCRF3_FS_CAL3

#define CCRF3_FS_CAL3 0x2F14

◆ CCRF3_FS_CFG

#define CCRF3_FS_CFG 0x0021

◆ CCRF3_FS_CHP

#define CCRF3_FS_CHP 0x2F18

◆ CCRF3_FS_DIG0

#define CCRF3_FS_DIG0 0x2F13

◆ CCRF3_FS_DIG1

#define CCRF3_FS_DIG1 0x2F12

◆ CCRF3_FS_DIVTWO

#define CCRF3_FS_DIVTWO 0x2F19

◆ CCRF3_FS_DSM0

#define CCRF3_FS_DSM0 0x2F1B

◆ CCRF3_FS_DSM1

#define CCRF3_FS_DSM1 0x2F1A

◆ CCRF3_FS_DVC0

#define CCRF3_FS_DVC0 0x2F1D

◆ CCRF3_FS_DVC1

#define CCRF3_FS_DVC1 0x2F1C

◆ CCRF3_FS_LBI

#define CCRF3_FS_LBI 0x2F1E

◆ CCRF3_FS_PFD

#define CCRF3_FS_PFD 0x2F1F

◆ CCRF3_FS_PRE

#define CCRF3_FS_PRE 0x2F20

◆ CCRF3_FS_REG_DIV_CML

#define CCRF3_FS_REG_DIV_CML 0x2F21

◆ CCRF3_FS_SPARE

#define CCRF3_FS_SPARE 0x2F22

◆ CCRF3_FS_VCO0

#define CCRF3_FS_VCO0 0x2F27

◆ CCRF3_FS_VCO1

#define CCRF3_FS_VCO1 0x2F26

◆ CCRF3_FS_VCO2

#define CCRF3_FS_VCO2 0x2F25

◆ CCRF3_FS_VCO3

#define CCRF3_FS_VCO3 0x2F24

◆ CCRF3_FS_VCO4

#define CCRF3_FS_VCO4 0x2F23

◆ CCRF3_FSCAL_CTRL

#define CCRF3_FSCAL_CTRL 0x2F8D

◆ CCRF3_FSRF_TEST

#define CCRF3_FSRF_TEST 0x2F97

◆ CCRF3_GBIAS0

#define CCRF3_GBIAS0 0x2F2E

◆ CCRF3_GBIAS1

#define CCRF3_GBIAS1 0x2F2D

◆ CCRF3_GBIAS2

#define CCRF3_GBIAS2 0x2F2C

◆ CCRF3_GBIAS3

#define CCRF3_GBIAS3 0x2F2B

◆ CCRF3_GBIAS4

#define CCRF3_GBIAS4 0x2F2A

◆ CCRF3_GBIAS5

#define CCRF3_GBIAS5 0x2F29

◆ CCRF3_GBIAS6

#define CCRF3_GBIAS6 0x2F28

◆ CCRF3_GPIO_STATUS

#define CCRF3_GPIO_STATUS 0x2F8C

◆ CCRF3_IF_ADC0

#define CCRF3_IF_ADC0 0x2F11

◆ CCRF3_IF_ADC1

#define CCRF3_IF_ADC1 0x2F10

◆ CCRF3_IF_ADC2

#define CCRF3_IF_ADC2 0x2F0F

◆ CCRF3_IF_MIX_CFG

#define CCRF3_IF_MIX_CFG 0x2F00

ccRF 3 Extended configuration register.

Specified extended configuration register for description of ccRF 3 Click driver.

◆ CCRF3_IFAMP

#define CCRF3_IFAMP 0x2F2F

◆ CCRF3_IOCFG0

#define CCRF3_IOCFG0 0x0003

◆ CCRF3_IOCFG1

#define CCRF3_IOCFG1 0x0002

◆ CCRF3_IOCFG2

#define CCRF3_IOCFG2 0x0001

◆ CCRF3_IOCFG3

#define CCRF3_IOCFG3 0x0000

ccRF 3 description register.

Specified register for description of ccRF 3 Click driver.

ccRF 3 configuration register.

Specified configuration register for description of ccRF 3 Click driver.

◆ CCRF3_IQIC

#define CCRF3_IQIC 0x0010

◆ CCRF3_IQIE_I0

#define CCRF3_IQIE_I0 0x2F6E

◆ CCRF3_IQIE_I1

#define CCRF3_IQIE_I1 0x2F6D

◆ CCRF3_IQIE_Q0

#define CCRF3_IQIE_Q0 0x2F70

◆ CCRF3_IQIE_Q1

#define CCRF3_IQIE_Q1 0x2F6F

◆ CCRF3_IRQ0F

#define CCRF3_IRQ0F 0x2F40

◆ CCRF3_IRQ0M

#define CCRF3_IRQ0M 0x2F3F

◆ CCRF3_LNA

#define CCRF3_LNA 0x2F30

◆ CCRF3_LQI_VAL

#define CCRF3_LQI_VAL 0x2F74

◆ CCRF3_MAGN0

#define CCRF3_MAGN0 0x2F83

◆ CCRF3_MAGN1

#define CCRF3_MAGN1 0x2F82

◆ CCRF3_MAGN2

#define CCRF3_MAGN2 0x2F81

◆ CCRF3_MARC_SPARE

#define CCRF3_MARC_SPARE 0x2F03

◆ CCRF3_MARC_STATUS0

#define CCRF3_MARC_STATUS0 0x2F95

◆ CCRF3_MARC_STATUS1

#define CCRF3_MARC_STATUS1 0x2F94

◆ CCRF3_MARCSTATE

#define CCRF3_MARCSTATE 0x2F73

◆ CCRF3_MDMCFG0

#define CCRF3_MDMCFG0 0x0013

◆ CCRF3_MDMCFG1

#define CCRF3_MDMCFG1 0x0012

◆ CCRF3_MODCFG_DEV_E

#define CCRF3_MODCFG_DEV_E 0x000B

◆ CCRF3_MODEM_STATUS0

#define CCRF3_MODEM_STATUS0 0x2F93

◆ CCRF3_MODEM_STATUS1

#define CCRF3_MODEM_STATUS1 0x2F92

◆ CCRF3_NUM_RXBYTES

#define CCRF3_NUM_RXBYTES 0x2FD7

◆ CCRF3_NUM_TXBYTES

#define CCRF3_NUM_TXBYTES 0x2FD6

◆ CCRF3_PA_CFG0

#define CCRF3_PA_CFG0 0x002D

◆ CCRF3_PA_CFG1

#define CCRF3_PA_CFG1 0x002C

◆ CCRF3_PA_CFG2

#define CCRF3_PA_CFG2 0x002B

◆ CCRF3_PA_CFG3

#define CCRF3_PA_CFG3 0x2F39

◆ CCRF3_PA_IFAMP_TEST

#define CCRF3_PA_IFAMP_TEST 0x2F96

◆ CCRF3_PARTNUMBER

#define CCRF3_PARTNUMBER 0x2F8F

◆ CCRF3_PARTVERSION

#define CCRF3_PARTVERSION 0x2F90

◆ CCRF3_PHASE_ADJUST

#define CCRF3_PHASE_ADJUST 0x2F8E

◆ CCRF3_PKT_CFG0

#define CCRF3_PKT_CFG0 0x0028

◆ CCRF3_PKT_CFG1

#define CCRF3_PKT_CFG1 0x0027

◆ CCRF3_PKT_CFG2

#define CCRF3_PKT_CFG2 0x0026

◆ CCRF3_PKT_LEN

#define CCRF3_PKT_LEN 0x002E

◆ CCRF3_PQT_SYNC_ERR

#define CCRF3_PQT_SYNC_ERR 0x2F75

◆ CCRF3_PRE_OVR

#define CCRF3_PRE_OVR 0x2F99

◆ CCRF3_PRE_TEST

#define CCRF3_PRE_TEST 0x2F98

◆ CCRF3_PREAMBLE_CFG0

#define CCRF3_PREAMBLE_CFG0 0x000E

◆ CCRF3_PREAMBLE_CFG1

#define CCRF3_PREAMBLE_CFG1 0x000D

◆ CCRF3_RCCAL_COARSE

#define CCRF3_RCCAL_COARSE 0x2F08

◆ CCRF3_RCCAL_FINE

#define CCRF3_RCCAL_FINE 0x2F07

◆ CCRF3_RCCAL_OFFSET

#define CCRF3_RCCAL_OFFSET 0x2F09

◆ CCRF3_RFEND_CFG0

#define CCRF3_RFEND_CFG0 0x002A

◆ CCRF3_RFEND_CFG1

#define CCRF3_RFEND_CFG1 0x0029

◆ CCRF3_RNDGEN

#define CCRF3_RNDGEN 0x2F80

◆ CCRF3_RSSI0

#define CCRF3_RSSI0 0x2F72

◆ CCRF3_RSSI1

#define CCRF3_RSSI1 0x2F71

◆ CCRF3_RXFIRST

#define CCRF3_RXFIRST 0x2FD2

◆ CCRF3_RXLAST

#define CCRF3_RXLAST 0x2FD4

◆ CCRF3_RXMIX

#define CCRF3_RXMIX 0x2F31

◆ CCRF3_SERIAL_STATUS

#define CCRF3_SERIAL_STATUS 0x2F91

◆ CCRF3_SETTLING_CFG

#define CCRF3_SETTLING_CFG 0x0020

◆ CCRF3_SYMBOL_RATE0

#define CCRF3_SYMBOL_RATE0 0x0016

◆ CCRF3_SYMBOL_RATE1

#define CCRF3_SYMBOL_RATE1 0x0015

◆ CCRF3_SYMBOL_RATE2

#define CCRF3_SYMBOL_RATE2 0x0014

◆ CCRF3_SYNC0

#define CCRF3_SYNC0 0x0007

◆ CCRF3_SYNC1

#define CCRF3_SYNC1 0x0006

◆ CCRF3_SYNC2

#define CCRF3_SYNC2 0x0005

◆ CCRF3_SYNC3

#define CCRF3_SYNC3 0x0004

◆ CCRF3_SYNC_CFG0

#define CCRF3_SYNC_CFG0 0x0009

◆ CCRF3_SYNC_CFG1

#define CCRF3_SYNC_CFG1 0x0008

◆ CCRF3_TOC_CFG

#define CCRF3_TOC_CFG 0x2F02

◆ CCRF3_TXFIRST

#define CCRF3_TXFIRST 0x2FD3

◆ CCRF3_TXLAST

#define CCRF3_TXLAST 0x2FD5

◆ CCRF3_WOR_CAPTURE0

#define CCRF3_WOR_CAPTURE0 0x2F67

◆ CCRF3_WOR_CAPTURE1

#define CCRF3_WOR_CAPTURE1 0x2F66

◆ CCRF3_WOR_CFG0

#define CCRF3_WOR_CFG0 0x0023

◆ CCRF3_WOR_CFG1

#define CCRF3_WOR_CFG1 0x0022

◆ CCRF3_WOR_EVENT0_LSB

#define CCRF3_WOR_EVENT0_LSB 0x0025

◆ CCRF3_WOR_EVENT0_MSB

#define CCRF3_WOR_EVENT0_MSB 0x0024

◆ CCRF3_WOR_TIME0

#define CCRF3_WOR_TIME0 0x2F65

◆ CCRF3_WOR_TIME1

#define CCRF3_WOR_TIME1 0x2F64

ccRF 3 Status registers.

Specified status registers for description of ccRF 3 Click driver.

◆ CCRF3_XOSC0

#define CCRF3_XOSC0 0x2F37

◆ CCRF3_XOSC1

#define CCRF3_XOSC1 0x2F36

◆ CCRF3_XOSC2

#define CCRF3_XOSC2 0x2F35

◆ CCRF3_XOSC3

#define CCRF3_XOSC3 0x2F34

◆ CCRF3_XOSC4

#define CCRF3_XOSC4 0x2F33

◆ CCRF3_XOSC5

#define CCRF3_XOSC5 0x2F32

◆ CCRF3_XOSC_TEST0

#define CCRF3_XOSC_TEST0 0x2FA0

◆ CCRF3_XOSC_TEST1

#define CCRF3_XOSC_TEST1 0x2F9F

Macros