cdc.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef CDC_H
#define CDC_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define CDC_OPCODE_WR_MEM               0xA0
#define CDC_OPCODE_RD_MEM               0x20
#define CDC_OPCODE_RD_RES               0x40
#define CDC_OPCODE_POR                  0x88
#define CDC_OPCODE_INITIALIZE           0x8A
#define CDC_OPCODE_CDC_START            0x8C
#define CDC_OPCODE_RDC_START            0x8E
#define CDC_OPCODE_DSP_TRIG             0x8D
#define CDC_OPCODE_NV_STORE             0x96
#define CDC_OPCODE_NV_RECALL            0x99
#define CDC_OPCODE_NV_ERASE             0x9C
#define CDC_OPCODE_TEST_READ            0x7E
#define CDC_REG_CFG0                    0x00
#define CDC_REG_CFG1                    0x01
#define CDC_REG_CFG2                    0x02
#define CDC_REG_CFG3                    0x03
#define CDC_REG_CFG4                    0x04
#define CDC_REG_CFG5                    0x05
#define CDC_REG_CFG6                    0x06
#define CDC_REG_CFG7                    0x07
#define CDC_REG_CFG8                    0x08
#define CDC_REG_CFG9                    0x09
#define CDC_REG_CFG10                   0x0A
#define CDC_REG_CFG11                   0x0B
#define CDC_REG_CFG12                   0x0C
#define CDC_REG_CFG13                   0x0D
#define CDC_REG_CFG14                   0x0E
#define CDC_REG_CFG15                   0x0F
#define CDC_REG_CFG16                   0x10
#define CDC_REG_CFG17                   0x11
#define CDC_REG_CFG18                   0x12
#define CDC_REG_CFG19                   0x13
#define CDC_REG_CFG20                   0x14
#define CDC_REG_CFG21                   0x15
#define CDC_REG_CFG22                   0x16
#define CDC_REG_CFG23                   0x17
#define CDC_REG_CFG24                   0x18
#define CDC_REG_CFG25                   0x19
#define CDC_REG_CFG26                   0x1A
#define CDC_REG_CFG27                   0x1B
#define CDC_REG_CFG28                   0x1C
#define CDC_REG_CFG29                   0x1D
#define CDC_REG_CFG30                   0x1E
#define CDC_REG_CFG31                   0x1F
#define CDC_REG_CFG32                   0x20
#define CDC_REG_CFG33                   0x21
#define CDC_REG_CFG34                   0x22
#define CDC_REG_CFG35                   0x23
#define CDC_REG_CFG38                   0x26
#define CDC_REG_CFG39                   0x27
#define CDC_REG_CFG40                   0x28
#define CDC_REG_CFG41                   0x29
#define CDC_REG_CFG42                   0x2A
#define CDC_REG_CFG47                   0x2F
#define CDC_REG_CFG48                   0x30
#define CDC_REG_CFG49                   0x31
#define CDC_REG_CFG50                   0x32
#define CDC_REG_CFG54                   0x36
#define CDC_REG_CFG62                   0x3E
#define CDC_REG_CFG63                   0x3F
 
#define CDC_REG_RES0                    0x00
#define CDC_REG_RES1                    0x04
#define CDC_REG_RES2                    0x08
#define CDC_REG_RES3                    0x0C
#define CDC_REG_RES4                    0x10
#define CDC_REG_RES5                    0x14
#define CDC_REG_RES6                    0x18
#define CDC_REG_RES7                    0x1C
#define CDC_REG_STATUS_0                0x20
#define CDC_REG_STATUS_1                0x21
#define CDC_REG_STATUS_2                0x22
 
 // cdc_reg
 
#define CDC_MEM_ADDRESS_START           0x0000u
#define CDC_MEM_ADDRESS_END             0x03FFu
#define CDC_MEM_ADDRESS_CFG_OFFSET      0x03C0u
#define CDC_MEM_ADDRESS_WR_BLOCK_SIZE   64
 
#define CDC_FIXED_POINT_NUM_FRACTIONAL  27
 
#define CDC_TEST_READ_RES               0x11
 
#define CDC_DEVICE_ADDRESS              0x28
 
#define CDC_SET_DATA_SAMPLE_EDGE        SET_SPI_DATA_SAMPLE_EDGE
#define CDC_SET_DATA_SAMPLE_MIDDLE      SET_SPI_DATA_SAMPLE_MIDDLE
 
 // cdc_set
 
#define CDC_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl  = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda  = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.sis = MIKROBUS( mikrobus, MIKROBUS_AN );
 
 // cdc_map
 // cdc
 
typedef enum
{
    CDC_DRV_SEL_SPI,      
    CDC_DRV_SEL_I2C       
} cdc_drv_t;
 
typedef struct cdc_s
{
    digital_out_t sis;              
    i2c_master_t i2c;               
    spi_master_t spi;               
    uint8_t      slave_address;     
    pin_name_t   chip_select;       
    cdc_drv_t    drv_sel;           
} cdc_t;
 
typedef struct
{
    pin_name_t scl;                 
    pin_name_t sda;                 
    pin_name_t miso;                
    pin_name_t mosi;                
    pin_name_t sck;                 
    pin_name_t cs;                  
    pin_name_t sis;                 
    uint32_t   i2c_speed;           
    uint8_t    i2c_address;         
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
    cdc_drv_t drv_sel;              
} cdc_cfg_t;
 
typedef struct
{
    float res_0;                    
    float res_1;                    
    float res_2;                    
    float res_3;                    
    float res_4;                    
    float res_5;                    
    float res_6;                    
    float res_7;                    
    uint8_t status_0;               
    uint8_t status_1;               
    uint8_t status_2;               
} cdc_results_t;
 
typedef enum
{
    CDC_OK = 0,
    CDC_ERROR = -1
 
} cdc_return_value_t;
 
void cdc_cfg_setup ( cdc_cfg_t *cfg );
 
void cdc_drv_interface_sel ( cdc_cfg_t *cfg, cdc_drv_t drv_sel );
 
err_t cdc_init ( cdc_t *ctx, cdc_cfg_t *cfg );
 
err_t cdc_default_cfg ( cdc_t *ctx );
 
err_t cdc_write_memory ( cdc_t *ctx, uint16_t address, const uint8_t *data_in, uint16_t len );
 
err_t cdc_read_memory ( cdc_t *ctx, uint16_t address, uint8_t *data_out, uint16_t len );
 
err_t cdc_write_config ( cdc_t *ctx, uint8_t address, const uint8_t *data_in, uint8_t len );
 
err_t cdc_read_config ( cdc_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len );
 
err_t cdc_read_result ( cdc_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len );
 
err_t cdc_send_opcode ( cdc_t *ctx, uint8_t opcode );
 
err_t cdc_check_communication ( cdc_t *ctx );
 
err_t cdc_read_results ( cdc_t *ctx, cdc_results_t *results );
 
#ifdef __cplusplus
}
#endif
#endif // CDC_H
 
 // cdc
 
// ------------------------------------------------------------------------ END