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dac10 2.0.0.0
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Settings for registers of DAC 10 Click driver. More...
Settings for registers of DAC 10 Click driver.
| #define DAC10_DEV_ADDR_BROADCAST 0x47 |
| #define DAC10_DEV_ADDR_GND 0x48 |
DAC 10 device address setting.
Specified setting for device slave address selection of DAC 10 Click driver.
| #define DAC10_DEV_ADDR_SCL 0x4B |
| #define DAC10_DEV_ADDR_SDA 0x4A |
| #define DAC10_DEV_ADDR_VCC 0x49 |
| #define DAC10_GEN_CONFIG_CODE_STEP_16LSB 0x0C00 |
| #define DAC10_GEN_CONFIG_CODE_STEP_1LSB 0x0000 |
| #define DAC10_GEN_CONFIG_CODE_STEP_2LSB 0x0200 |
| #define DAC10_GEN_CONFIG_CODE_STEP_32LSB 0x0E00 |
| #define DAC10_GEN_CONFIG_CODE_STEP_3LSB 0x0400 |
| #define DAC10_GEN_CONFIG_CODE_STEP_4LSB 0x0600 |
| #define DAC10_GEN_CONFIG_CODE_STEP_6LSB 0x0800 |
| #define DAC10_GEN_CONFIG_CODE_STEP_8LSB 0x0A00 |
| #define DAC10_GEN_CONFIG_CODE_STEP_MASK 0x0E00 |
| #define DAC10_GEN_CONFIG_DAC_PDN_MASK 0x0018 |
| #define DAC10_GEN_CONFIG_DAC_PDN_POWER_DOWN_10K 0x0008 |
| #define DAC10_GEN_CONFIG_DAC_PDN_POWER_DOWN_HIGH_Z 0x0010 |
| #define DAC10_GEN_CONFIG_DAC_PDN_POWER_UP 0x0000 |
| #define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_1p5X 0x0000 |
| #define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_2X 0x0001 |
| #define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_3X 0x0002 |
| #define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_4X 0x0003 |
| #define DAC10_GEN_CONFIG_DAC_SPAN_MASK 0x0003 |
| #define DAC10_GEN_CONFIG_DEVICE_LOCK_MASK 0x2000 |
| #define DAC10_GEN_CONFIG_DEVICE_LOCKED 0x2000 |
| #define DAC10_GEN_CONFIG_DEVICE_NOT_LOCKED 0x0000 |
| #define DAC10_GEN_CONFIG_FCFG_CLR_MASK 0xC000 |
| #define DAC10_GEN_CONFIG_FCFG_SAW_TOOTH_WAVE_FALLING 0x8000 |
| #define DAC10_GEN_CONFIG_FCFG_SAW_TOOTH_WAVE_RISING 0x4000 |
| #define DAC10_GEN_CONFIG_FCFG_SQUARE_WAVE 0xC000 |
| #define DAC10_GEN_CONFIG_FCFG_TRIANGLE_WAVE 0x0000 |
DAC 10 general config register setting.
Specified settings for general config register of DAC 10 Click driver.
| #define DAC10_GEN_CONFIG_INT_REF_DISABLE 0x0000 |
| #define DAC10_GEN_CONFIG_INT_REF_EN_MASK 0x0004 |
| #define DAC10_GEN_CONFIG_INT_REF_ENABLE 0x0004 |
| #define DAC10_GEN_CONFIG_PMBUS_DISABLE 0x0000 |
| #define DAC10_GEN_CONFIG_PMBUS_EN_MASK 0x1000 |
| #define DAC10_GEN_CONFIG_PMBUS_ENABLE 0x1000 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_12US 0x0180 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MS 0x0100 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p25 0x0120 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p50 0x0140 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p75 0x0160 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_204p8US 0x0080 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p25 0x00A0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p50 0x00C0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p75 0x00E0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_25p6US 0x0000 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p25 0x0020 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p50 0x0040 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p75 0x0060 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_4US 0x01C0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_8US 0x01A0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_MASK 0x01E0 |
| #define DAC10_GEN_CONFIG_SLEW_RATE_NO_SLEW 0x01E0 |
| #define DAC10_MAX_DAC_VALUE 0x03FF |
| #define DAC10_MIN_DAC_VALUE 0x0000 |
DAC 10 range values.
DAC range values of DAC 10 Click driver.
| #define DAC10_PMBUS_OPERATION_CMD 0xFF00 |
| #define DAC10_PMBUS_OPERATION_CMD_MARGIN_HIGH 0xA400 |
| #define DAC10_PMBUS_OPERATION_CMD_MARGIN_LOW 0x9400 |
| #define DAC10_PMBUS_OPERATION_CMD_TURN_OFF 0x0000 |
DAC 10 PMBus operation register setting.
Specified settings for PMBus operation register of DAC 10 Click driver.
| #define DAC10_PMBUS_OPERATION_CMD_TURN_ON 0x8000 |
| #define DAC10_PMBUS_STATUS_BYTE_CML_FAULT 0x0200 |
| #define DAC10_PMBUS_STATUS_BYTE_CML_MASK 0x0200 |
| #define DAC10_PMBUS_STATUS_BYTE_CML_NO_FAULT 0x0000 |
DAC 10 PMBus status byte register setting.
Specified settings for PMBus status byte register of DAC 10 Click driver.
| #define DAC10_PMBUS_VERSION_DEFAULT 0x2200 |
DAC 10 PMBus version register setting.
Specified settings for PMBus version register of DAC 10 Click driver.
| #define DAC10_PMBUS_VERSION_MASK 0xFF00 |
| #define DAC10_STATUS_DAC_UPDATE_BUSY 0x1000 |
| #define DAC10_STATUS_DEVICE_ID 0x000C |
| #define DAC10_STATUS_DEVICE_ID_MASK 0x003C |
| #define DAC10_STATUS_NVM_BUSY 0x2000 |
| #define DAC10_STATUS_NVM_CRC_ALARM_INTERNAL 0x4000 |
| #define DAC10_STATUS_NVM_CRC_ALARM_USER 0x8000 |
DAC 10 status register values.
Specified values for status register of DAC 10 Click driver.
| #define DAC10_STATUS_VERSION_ID_MASK 0x0003 |
| #define DAC10_TRIGGER_DEVICE_CONFIG_RESET_INITIATED 0x0200 |
| #define DAC10_TRIGGER_DEVICE_CONFIG_RESET_MASK 0x0200 |
| #define DAC10_TRIGGER_DEVICE_CONFIG_RESET_NOT_INITIATED 0x0000 |
| #define DAC10_TRIGGER_DEVICE_UNLOCK_CODE 0x5000 |
DAC 10 trigger register setting.
Specified settings for trigger register of DAC 10 Click driver.
| #define DAC10_TRIGGER_DEVICE_UNLOCK_CODE_MASK 0xF000 |
| #define DAC10_TRIGGER_NWM_PROG_INITIATED 0x0010 |
| #define DAC10_TRIGGER_NWM_PROG_MASK 0x0010 |
| #define DAC10_TRIGGER_NWM_PROG_NOT_INITIATED 0x0000 |
| #define DAC10_TRIGGER_NWM_RELOAD_INITIATED 0x0020 |
| #define DAC10_TRIGGER_NWM_RELOAD_MASK 0x0020 |
| #define DAC10_TRIGGER_NWM_RELOAD_NOT_INITIATED 0x0000 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_INITIATED 0x0080 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_MASK 0x0080 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_NOT_INITIATED 0x0000 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_LOW_INITIATED 0x0040 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_LOW_MASK 0x0040 |
| #define DAC10_TRIGGER_PMBUS_MARGIN_LOW_NOT_INITIATED 0x0000 |
| #define DAC10_TRIGGER_START_FUNC_GEN_DISABLE 0x0000 |
| #define DAC10_TRIGGER_START_FUNC_GEN_ENABLE 0x0100 |
| #define DAC10_TRIGGER_START_FUNC_GEN_MASK 0x0100 |
| #define DAC10_TRIGGER_SW_RESET_INITIATED 0x0008 |
| #define DAC10_TRIGGER_SW_RESET_MASK 0x000F |
| #define DAC10_TRIGGER_SW_RESET_NOT_INITIATED 0x000A |
| #define DAC10_VREF_3V3 3.3 |
DAC 10 vref values.
DAC vref values of DAC 10 Click driver.
| #define DAC10_VREF_5V 5 |
| #define DAC10_VREF_INT 1.21 |