daq 2.0.0.0
DAQ Registers Settings

Settings for registers of DAQ Click driver. More...

Macros

#define DAQ_INTERFACE_CRC_EN_MSK   (0x1 << 6)
 DAQ inteface format settings.
 
#define DAQ_INTERFACE_CRC_EN(x)   (((x) & 0x1) << 6)
 
#define DAQ_INTERFACE_CRC_TYPE_MSK   (0x1 << 5)
 
#define DAQ_INTERFACE_CRC_TYPE(x)   (((x) & 0x1) << 5)
 
#define DAQ_INTERFACE_STATUS_EN_MSK   (0x1 << 4)
 
#define DAQ_INTERFACE_STATUS_EN(x)   (((x) & 0x1) << 4)
 
#define DAQ_INTERFACE_CONVLEN_MSK   (0x1 << 3)
 
#define DAQ_INTERFACE_CONVLEN(x)   (((x) & 0x1) << 3)
 
#define DAQ_INTERFACE_RDY_EN_MSK   (0x1 << 2)
 
#define DAQ_INTERFACE_RDY_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_INTERFACE_CONT_READ_MSK   (0x1 << 0)
 
#define DAQ_INTERFACE_CONT_READ_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_POWER_CLK_PWRMODE_MSK   0x3
 DAQ power clock settings.
 
#define DAQ_POWER_CLK_PWRMODE(x)   (((x) & 0x3) << 0)
 
#define DAQ_POWER_CLK_MOD_OUT_MSK   (0x1 << 2)
 
#define DAQ_POWER_CLK_MOD_OUT(x)   (((x) & 0x1) << 2)
 
#define DAQ_POWER_CLK_POWER_DOWN   0x08
 
#define DAQ_POWER_CLK_MCLK_DIV_MSK   (0x3 << 4)
 
#define DAQ_POWER_CLK_MCLK_DIV(x)   (((x) & 0x3) << 4)
 
#define DAQ_POWER_CLK_CLOCK_SEL_MSK   (0x3 << 6)
 
#define DAQ_POWER_CLK_CLOCK_SEL(x)   (((x) & 0x3) << 6)
 
#define DAQ_CONVERSION_DIAG_MUX_MSK   (0xF << 4)
 DAQ conversion settings.
 
#define DAQ_CONVERSION_DIAG_MUX_SEL(x)   (((x) & 0xF) << 4)
 
#define DAQ_CONVERSION_DIAG_SEL_MSK   (0x1 << 3)
 
#define DAQ_CONVERSION_DIAG_SEL(x)   (((x) & 0x1) << 3)
 
#define DAQ_CONVERSION_MODE_MSK   (0x7 << 0)
 
#define DAQ_CONVERSION_MODE(x)   (((x) & 0x7) << 0)
 
#define DAQ_ANALOG_REF_BUF_POS_MSK   (0x3 << 6)
 DAQ analog settings.
 
#define DAQ_ANALOG_REF_BUF_POS(x)   (((x) & 0x3) << 6)
 
#define DAQ_ANALOG_REF_BUF_NEG_MSK   (0x3 << 4)
 
#define DAQ_ANALOG_REF_BUF_NEG(x)   (((x) & 0x3) << 4)
 
#define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK   (0x1 << 1)
 
#define DAQ_ANALOG_AIN_BUF_POS_OFF(x)   (((x) & 0x1) << 1)
 
#define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK   (0x1 << 0)
 
#define DAQ_ANALOG_AIN_BUF_NEG_OFF(x)   (((x) & 0x1) << 0)
 
#define DAQ_ANALOG2_VCM_MSK   (0x7 << 0)
 
#define DAQ_ANALOG2_VCM(x)   (((x) & 0x7) << 0)
 
#define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK   (0x1 << 7)
 DAQ digital filter settings.
 
#define DAQ_DIGI_FILTER_60HZ_REJ_EN(x)   (((x) & 0x1) << 7)
 
#define DAQ_DIGI_FILTER_FILTER_MSK   (0x7 << 4)
 
#define DAQ_DIGI_FILTER_FILTER(x)   (((x) & 0x7) << 4)
 
#define DAQ_DIGI_FILTER_DEC_RATE_MSK   (0x7 << 0)
 
#define DAQ_DIGI_FILTER_DEC_RATE(x)   (((x) & 0x7) << 0)
 
#define DAQ_SINC3_DEC_RATE_MSB_MSK   (0x0F << 0)
 DAQ sinc3 decimal rate settings.
 
#define DAQ_SINC3_DEC_RATE_MSB(x)   (((x) & 0x0F) << 0)
 
#define DAQ_SINC3_DEC_RATE_LSB_MSK   (0xFF << 0)
 
#define DAQ_SINC3_DEC_RATE_LSB(x)   (((x) & 0xFF) << 0)
 
#define DAQ_DC_RATIO_IDLE_TIME_MSK   (0xFF << 0)
 DAQ duty cycle ratio settings.
 
#define DAQ_DC_RATIO_IDLE_TIME(x)   (((x) & 0xFF) << 0)
 
#define DAQ_SYNC_RST_SPI_STARTB_MSK   (0x1 << 7)
 DAQ sync reset settings.
 
#define DAQ_SYNC_RST_SPI_STARTB(x)   (((x) & 0x1) << 7)
 
#define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK   (0x1 << 6)
 
#define DAQ_SYNC_RST_SYNCOUT_EDGE(x)   (((x) & 0x1) << 6)
 
#define DAQ_SYNC_RST_GPIO_START_EN_MSK   (0x1 << 3)
 
#define DAQ_SYNC_RST_GPIO_START_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_SYNC_RST_SPI_RESET_MSK   (0x3 << 0)
 
#define DAQ_SYNC_RST_SPI_RESET(x)   (((x) & 0x3) << 0)
 
#define DAQ_GPIO_CNTRL_UGPIO_EN_MSK   (0x1 << 7)
 DAQ gpio control settings.
 
#define DAQ_GPIO_CNTRL_UGPIO_EN(x)   (((x) & 0x1) << 7)
 
#define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK   (0x1 << 6)
 
#define DAQ_GPIO_CNTRL_GPIO2_OD_EN(x)   (((x) & 0x1) << 6)
 
#define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK   (0x1 << 5)
 
#define DAQ_GPIO_CNTRL_GPIO1_OD_EN(x)   (((x) & 0x1) << 5)
 
#define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK   (0x1 << 4)
 
#define DAQ_GPIO_CNTRL_GPIO0_OD_EN(x)   (((x) & 0x1) << 4)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK   (0x7 << 4)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN(x)   (((x) & 0x7) << 4)
 
#define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK   (0x1 << 3)
 
#define DAQ_GPIO_CNTRL_GPIO3_OP_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK   (0x1 << 2)
 
#define DAQ_GPIO_CNTRL_GPIO2_OP_EN(x)   (((x) & 0x1) << 2)
 
#define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK   (0x1 << 1)
 
#define DAQ_GPIO_CNTRL_GPIO1_OP_EN(x)   (((x) & 0x1) << 1)
 
#define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK   (0x1 << 0)
 
#define DAQ_GPIO_CNTRL_GPIO0_OP_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK   (0xF << 0)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN(x)   (((x) & 0xF) << 0)
 
#define DAQ_GPIO_WRITE_3_MSK   (0x1 << 3)
 
#define DAQ_GPIO_WRITE_3(x)   (((x) & 0x1) << 3)
 
#define DAQ_GPIO_WRITE_2_MSK   (0x1 << 2)
 
#define DAQ_GPIO_WRITE_2(x)   (((x) & 0x1) << 2)
 
#define DAQ_GPIO_WRITE_1_MSK   (0x1 << 1)
 
#define DAQ_GPIO_WRITE_1(x)   (((x) & 0x1) << 1)
 
#define DAQ_GPIO_WRITE_0_MSK   (0x1 << 0)
 
#define DAQ_GPIO_WRITE_0(x)   (((x) & 0x1) << 0)
 
#define DAQ_GPIO_WRITE_ALL_MSK   (0xF << 0)
 
#define DAQ_GPIO_WRITE_ALL(x)   (((x) & 0xF))
 
#define DAQ_GPIO_READ_3_MSK   (0x1 << 3)
 
#define DAQ_GPIO_READ_2_MSK   (0x1 << 2)
 
#define DAQ_GPIO_READ_1_MSK   (0x1 << 1)
 
#define DAQ_GPIO_READ_0_MSK   (0x1 << 0)
 
#define DAQ_GPIO_READ_ALL_MSK   (0xF << 0)
 
#define DAQ_OFFSET_HI_MSK   (0xFF << 0)
 DAQ offset settings.
 
#define DAQ_OFFSET_HI(x)   (((x) & 0xFF) << 0)
 
#define DAQ_OFFSET_MID_MSK   (0xFF << 0)
 
#define DAQ_OFFSET_MID(x)   (((x) & 0xFF) << 0)
 
#define DAQ_OFFSET_LO_MSK   (0xFF << 0)
 
#define DAQ_OFFSET_LO(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_HI_MSK   (0xFF << 0)
 DAQ gain settings.
 
#define DAQ_GAIN_HI(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_MID_MSK   (0xFF << 0)
 
#define DAQ_GAIN_MID(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_LOW_MSK   (0xFF << 0)
 
#define DAQ_GAIN_LOW(x)   (((x) & 0xFF) << 0)
 
#define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK   (0x1 << 4)
 DAQ spi diagnostic enable settings.
 
#define DAQ_SPI_DIAG_ERR_SPI_IGNORE(x)   (((x) & 0x1) << 4)
 
#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK   (0x1 << 3)
 
#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT(x)   (((x) & 0x1) << 3)
 
#define DAQ_SPI_DIAG_ERR_SPI_RD_MSK   (0x1 << 2)
 
#define DAQ_SPI_DIAG_ERR_SPI_RD(x)   (((x) & 0x1) << 2)
 
#define DAQ_SPI_DIAG_ERR_SPI_WR_MSK   (0x1 << 1)
 
#define DAQ_SPI_DIAG_ERR_SPI_WR(x)   (((x) & 0x1) << 1)
 
#define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK   (0x1 << 5)
 DAQ adc diagnostic enable settings.
 
#define DAQ_ADC_DIAG_ERR_DLDO_PSM(x)   (((x) & 0x1) << 5)
 
#define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK   (0x1 << 4)
 
#define DAQ_ADC_DIAG_ERR_ALDO_PSM(x)   (((x) & 0x1) << 4)
 
#define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK   (0x1 << 2)
 
#define DAQ_ADC_DIAG_ERR_FILT_SAT(x)   (((x) & 0x1) << 2)
 
#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK   (0x1 << 1)
 
#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET(x)   (((x) & 0x1) << 1)
 
#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK   (0x1 << 0)
 
#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL(x)   (((x) & 0x1) << 0)
 
#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK   (0x1 << 4)
 DAQ diagnostic enable settings.
 
#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC(x)   (((x) & 0x1) << 4)
 
#define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK   (0x1 << 3)
 
#define DAQ_DIG_DIAG_ERR_RAM_CRC(x)   (((x) & 0x1) << 3)
 
#define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK   (0x1 << 2)
 
#define DAQ_DIG_DIAG_ERR_FUSE_CRC(x)   (((x) & 0x1) << 2)
 
#define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK   (0x1 << 0)
 
#define DAQ_DIG_DIAG_FREQ_COUNT_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_MASTER_ERROR_MSK   (0x1 << 7)
 DAQ master status.
 
#define DAQ_MASTER_ADC_ERROR_MSK   (0x1 << 6)
 
#define DAQ_MASTER_DIG_ERROR_MSK   (0x1 << 5)
 
#define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK   (0x1 << 4)
 
#define DAQ_MASTER_FILT_SAT_MSK   (0x1 << 3)
 
#define DAQ_MASTER_FILT_NOT_SET_MSK   (0x1 << 2)
 
#define DAQ_MASTER_SPI_ERROR_MSK   (0x1 << 1)
 
#define DAQ_MASTER_POR_FLAG_MSK   (0x1 << 0)
 
#define DAQ_SPI_IGNORE_ERROR_MSK   (0x1 << 4)
 DAQ spi status.
 
#define DAQ_SPI_IGNORE_ERROR_CLR(x)   (((x) & 0x1) << 4)
 
#define DAQ_SPI_CLK_CNT_ERROR_MSK   (0x1 << 3)
 
#define DAQ_SPI_READ_ERROR_MSK   (0x1 << 2)
 
#define DAQ_SPI_READ_ERROR_CLR(x)   (((x) & 0x1) << 2)
 
#define DAQ_SPI_WRITE_ERROR_MSK   (0x1 << 1)
 
#define DAQ_SPI_WRITE_ERROR_CLR(x)   (((x) & 0x1) << 1)
 
#define DAQ_SPI_CRC_ERROR_MSK   (0x1 << 0)
 
#define DAQ_SPI_CRC_ERROR_CLR(x)   (((x) & 0x1) << 0)
 
#define DAQ_ADC_DLDO_PSM_ERROR_MSK   (0x1 << 5)
 DAQ adc status.
 
#define DAQ_ADC_ALDO_PSM_ERROR_MSK   (0x1 << 4)
 
#define DAQ_ADC_REF_DET_ERROR_MSK   (0x1 << 3)
 
#define DAQ_ADC_FILT_SAT_MSK   (0x1 << 2)
 
#define DAQ_ADC_FILT_NOT_SET_MSK   (0x1 << 1)
 
#define DAQ_ADC_DIG_ERR_EXT_CLK_MSK   (0x1 << 0)
 
#define DAQ_DIG_MEMMAP_CRC_ERROR_MSK   (0x1 << 4)
 DAQ diagnostic status.
 
#define DAQ_DIG_RAM_CRC_ERROR_MSK   (0x1 << 3)
 
#define DAQ_DIG_FUS_CRC_ERROR_MSK   (0x1 << 2)
 
#define DAQ_MCLK_COUNTER_MSK   (0xFF << 0)
 DAQ mclk counter settings.
 
#define DAQ_MCLK_COUNTER(x)   (((x) & 0xFF) << 0)
 
#define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK   (0x1 << 7)
 DAQ coefficient control settings.
 
#define DAQ_COEF_CONTROL_COEFFACCESSEN(x)   (((x) & 0x1) << 7)
 
#define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK   (0x1 << 6)
 
#define DAQ_COEF_CONTROL_COEFFWRITEEN(x)   (((x) & 0x1) << 6)
 
#define DAQ_COEF_CONTROL_COEFFADDR_MSK   (0x3F << 5)
 
#define DAQ_COEF_CONTROL_COEFFADDR(x)   (((x) & 0x3F) << 5)
 
#define DAQ_COEFF_DATA_USERCOEFFEN_MSK   (0x1 << 23)
 DAQ coefficient data settings.
 
#define DAQ_COEFF_DATA_USERCOEFFEN(x)   (((x) & 0x1) << 23)
 
#define DAQ_COEFF_DATA_COEFFDATA_MSK   (0x7FFFFF << 22)
 
#define DAQ_COEFF_DATA_COEFFDATA(x)   (((x) & 0x7FFFFF) << 22)
 
#define DAQ_ACCESS_KEY_MSK   (0xFF << 0)
 DAQ access settings.
 
#define DAQ_ACCESS_KEY(x)   (((x) & 0xFF) << 0)
 
#define DAQ_ACCESS_KEY_CHECK_MSK   (0x1 << 0)
 
#define DAQ_RESOLUTION   8388608
 DAQ resolution settings.
 

Enumerations

enum  daq_power_mode { DAQ_ECO = 0 , DAQ_MEDIAN = 2 , DAQ_FAST = 3 }
 DAQ power clock values. More...
 
enum  daq_mclk_div { DAQ_MCLK_DIV_16 = 0 , DAQ_MCLK_DIV_8 = 1 , DAQ_MCLK_DIV_4 = 2 , DAQ_MCLK_DIV_2 = 3 }
 DAQ mclk divider values. More...
 
enum  daq_conv_mode {
  DAQ_CONV_CONTINUOUS = 0 , DAQ_CONV_ONE_SHOT = 1 , DAQ_CONV_SINGLE = 2 , DAQ_CONV_PERIODIC = 3 ,
  DAQ_CONV_STANDBY = 4
}
 DAQ conversion mode values. More...
 
enum  daq_conv_len { DAQ_CONV_24BIT = 0 , DAQ_CONV_16BIT = 1 }
 DAQ conversion length values. More...
 
enum  daq_rdy_dout { DAQ_RDY_DOUT_EN , DAQ_RDY_DOUT_DIS }
 DAQ data ready enable values. More...
 
enum  daq_conv_diag_mux { DAQ_TEMP_SENSOR = 0x0 , DAQ_AIN_SHORT = 0x8 , DAQ_POSITIVE_FS = 0x9 , DAQ_NEGATIVE_FS = 0xA }
 DAQ conversion mux values. More...
 
enum  daq_crc_sel { DAQ_CRC , DAQ_XOR , DAQ_NO_CRC }
 DAQ crc selection values. More...
 
enum  daq_filter_type {
  DAQ_SINC5 = 0 , DAQ_SINC5_DECx8 = 1 , DAQ_SINC5_DECx16 = 2 , DAQ_SINC3 = 3 ,
  DAQ_FIR = 4
}
 DAQ filter type selection values. More...
 
enum  daq_sinc5_fir_decimate {
  DAQ_SINC5_FIR_DECx32 = 0 , DAQ_SINC5_FIR_DECx64 = 1 , DAQ_SINC5_FIR_DECx128 = 2 , DAQ_SINC5_FIR_DECx256 = 3 ,
  DAQ_SINC5_FIR_DECx512 = 4 , DAQ_SINC5_FIR_DECx1024 = 5
}
 DAQ Decimation ratios for SINC5 and FIR values. More...
 
enum  daq_sleep_wake { DAQ_SLEEP = 1 , DAQ_WAKE = 0 }
 DAQ power values. More...
 
enum  daq_ain_precharge { DAQ_AIN_ENABLED = 0 , DAQ_AIN_DISABLED = 1 }
 DAQ AIN precharge values. More...
 
enum  daq_ref_buffer { DAQ_BUF_ENABLED = 0 , DAQ_BUF_DISABLED = 1 , DAQ_BUF_FULL_BUFFER_ON = 2 }
 DAQ REF buffer values. More...
 
enum  daq_vcm_out {
  DAQ_VCM_HALF_VCC = 0 , DAQ_VCM_2_5V = 1 , DAQ_VCM_2_05V = 2 , DAQ_VCM_1_9V = 3 ,
  DAQ_VCM_1_65V = 4 , DAQ_VCM_1_1V = 5 , DAQ_VCM_0_9V = 6 , DAQ_VCM_OFF = 7
}
 DAQ VCM output voltage values. More...
 
enum  daq_gobal_gpio_enable { DAQ_GLOBAL_GPIO_ENABLE = 1 , DAQ_GLOBAL_GPIO_DISABLE = 0 }
 DAQ global gpio values. More...
 
enum  daq_gpios {
  DAQ_GPIO0 = 0 , DAQ_GPIO1 = 1 , DAQ_GPIO2 = 2 , DAQ_GPIO3 = 3 ,
  DAQ_ALL_GPIOS = 4
}
 DAQ global gpio numbering values. More...
 
enum  daq_gpio_write { DAQ_GPIO_LOW = 0 , DAQ_GPIO_HIGH = 1 }
 DAQ gpio state values. More...
 
enum  daq_gpio_output_type { DAQ_GPIO_STRONG_DRIVER = 0 , DAQ_GPIO_OPEN_DRAIN = 1 }
 DAQ gpio output type values. More...
 
enum  daq_continuous_read { DAQ_CONTINUOUS_READ_ENABLE = 1 , DAQ_CONTINUOUS_READ_DISABLE = 0 }
 DAQ continuous adc read enable values. More...
 
enum  daq_gain {
  DAQ_GAIN_12p603 = 6 , DAQ_GAIN_6p302 = 5 , DAQ_GAIN_3p151 = 4 , DAQ_GAIN_1p575 = 3 ,
  DAQ_GAIN_p788 = 2 , DAQ_GAIN_p394 = 1 , DAQ_GAIN_p197 = 0
}
 DAQ GAIN configuration values. More...
 

Detailed Description

Settings for registers of DAQ Click driver.

Macro Definition Documentation

◆ DAQ_ACCESS_KEY

#define DAQ_ACCESS_KEY ( x)    (((x) & 0xFF) << 0)

◆ DAQ_ACCESS_KEY_CHECK_MSK

#define DAQ_ACCESS_KEY_CHECK_MSK   (0x1 << 0)

◆ DAQ_ACCESS_KEY_MSK

#define DAQ_ACCESS_KEY_MSK   (0xFF << 0)

DAQ access settings.

Specified settings for access of DAQ Click driver.

◆ DAQ_ADC_ALDO_PSM_ERROR_MSK

#define DAQ_ADC_ALDO_PSM_ERROR_MSK   (0x1 << 4)

◆ DAQ_ADC_DIAG_ERR_ALDO_PSM

#define DAQ_ADC_DIAG_ERR_ALDO_PSM ( x)    (((x) & 0x1) << 4)

◆ DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK

#define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK   (0x1 << 4)

◆ DAQ_ADC_DIAG_ERR_DLDO_PSM

#define DAQ_ADC_DIAG_ERR_DLDO_PSM ( x)    (((x) & 0x1) << 5)

◆ DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK

#define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK   (0x1 << 5)

DAQ adc diagnostic enable settings.

Specified settings for adc diagnostic enable of DAQ Click driver.

◆ DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL

#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL ( x)    (((x) & 0x1) << 0)

◆ DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK

#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK   (0x1 << 0)

◆ DAQ_ADC_DIAG_ERR_FILT_NOT_SET

#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET ( x)    (((x) & 0x1) << 1)

◆ DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK

#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK   (0x1 << 1)

◆ DAQ_ADC_DIAG_ERR_FILT_SAT

#define DAQ_ADC_DIAG_ERR_FILT_SAT ( x)    (((x) & 0x1) << 2)

◆ DAQ_ADC_DIAG_ERR_FILT_SAT_MSK

#define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK   (0x1 << 2)

◆ DAQ_ADC_DIG_ERR_EXT_CLK_MSK

#define DAQ_ADC_DIG_ERR_EXT_CLK_MSK   (0x1 << 0)

◆ DAQ_ADC_DLDO_PSM_ERROR_MSK

#define DAQ_ADC_DLDO_PSM_ERROR_MSK   (0x1 << 5)

DAQ adc status.

Specified adc status of DAQ Click driver.

◆ DAQ_ADC_FILT_NOT_SET_MSK

#define DAQ_ADC_FILT_NOT_SET_MSK   (0x1 << 1)

◆ DAQ_ADC_FILT_SAT_MSK

#define DAQ_ADC_FILT_SAT_MSK   (0x1 << 2)

◆ DAQ_ADC_REF_DET_ERROR_MSK

#define DAQ_ADC_REF_DET_ERROR_MSK   (0x1 << 3)

◆ DAQ_ANALOG2_VCM

#define DAQ_ANALOG2_VCM ( x)    (((x) & 0x7) << 0)

◆ DAQ_ANALOG2_VCM_MSK

#define DAQ_ANALOG2_VCM_MSK   (0x7 << 0)

◆ DAQ_ANALOG_AIN_BUF_NEG_OFF

#define DAQ_ANALOG_AIN_BUF_NEG_OFF ( x)    (((x) & 0x1) << 0)

◆ DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK

#define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK   (0x1 << 0)

◆ DAQ_ANALOG_AIN_BUF_POS_OFF

#define DAQ_ANALOG_AIN_BUF_POS_OFF ( x)    (((x) & 0x1) << 1)

◆ DAQ_ANALOG_AIN_BUF_POS_OFF_MSK

#define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK   (0x1 << 1)

◆ DAQ_ANALOG_REF_BUF_NEG

#define DAQ_ANALOG_REF_BUF_NEG ( x)    (((x) & 0x3) << 4)

◆ DAQ_ANALOG_REF_BUF_NEG_MSK

#define DAQ_ANALOG_REF_BUF_NEG_MSK   (0x3 << 4)

◆ DAQ_ANALOG_REF_BUF_POS

#define DAQ_ANALOG_REF_BUF_POS ( x)    (((x) & 0x3) << 6)

◆ DAQ_ANALOG_REF_BUF_POS_MSK

#define DAQ_ANALOG_REF_BUF_POS_MSK   (0x3 << 6)

DAQ analog settings.

Specified settings for analog of DAQ Click driver.

◆ DAQ_COEF_CONTROL_COEFFACCESSEN

#define DAQ_COEF_CONTROL_COEFFACCESSEN ( x)    (((x) & 0x1) << 7)

◆ DAQ_COEF_CONTROL_COEFFACCESSEN_MSK

#define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK   (0x1 << 7)

DAQ coefficient control settings.

Specified settings for coefficient control of DAQ Click driver.

◆ DAQ_COEF_CONTROL_COEFFADDR

#define DAQ_COEF_CONTROL_COEFFADDR ( x)    (((x) & 0x3F) << 5)

◆ DAQ_COEF_CONTROL_COEFFADDR_MSK

#define DAQ_COEF_CONTROL_COEFFADDR_MSK   (0x3F << 5)

◆ DAQ_COEF_CONTROL_COEFFWRITEEN

#define DAQ_COEF_CONTROL_COEFFWRITEEN ( x)    (((x) & 0x1) << 6)

◆ DAQ_COEF_CONTROL_COEFFWRITEEN_MSK

#define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK   (0x1 << 6)

◆ DAQ_COEFF_DATA_COEFFDATA

#define DAQ_COEFF_DATA_COEFFDATA ( x)    (((x) & 0x7FFFFF) << 22)

◆ DAQ_COEFF_DATA_COEFFDATA_MSK

#define DAQ_COEFF_DATA_COEFFDATA_MSK   (0x7FFFFF << 22)

◆ DAQ_COEFF_DATA_USERCOEFFEN

#define DAQ_COEFF_DATA_USERCOEFFEN ( x)    (((x) & 0x1) << 23)

◆ DAQ_COEFF_DATA_USERCOEFFEN_MSK

#define DAQ_COEFF_DATA_USERCOEFFEN_MSK   (0x1 << 23)

DAQ coefficient data settings.

Specified settings for coefficient data of DAQ Click driver.

◆ DAQ_CONVERSION_DIAG_MUX_MSK

#define DAQ_CONVERSION_DIAG_MUX_MSK   (0xF << 4)

DAQ conversion settings.

Specified settings for conversion of DAQ Click driver.

◆ DAQ_CONVERSION_DIAG_MUX_SEL

#define DAQ_CONVERSION_DIAG_MUX_SEL ( x)    (((x) & 0xF) << 4)

◆ DAQ_CONVERSION_DIAG_SEL

#define DAQ_CONVERSION_DIAG_SEL ( x)    (((x) & 0x1) << 3)

◆ DAQ_CONVERSION_DIAG_SEL_MSK

#define DAQ_CONVERSION_DIAG_SEL_MSK   (0x1 << 3)

◆ DAQ_CONVERSION_MODE

#define DAQ_CONVERSION_MODE ( x)    (((x) & 0x7) << 0)

◆ DAQ_CONVERSION_MODE_MSK

#define DAQ_CONVERSION_MODE_MSK   (0x7 << 0)

◆ DAQ_DC_RATIO_IDLE_TIME

#define DAQ_DC_RATIO_IDLE_TIME ( x)    (((x) & 0xFF) << 0)

◆ DAQ_DC_RATIO_IDLE_TIME_MSK

#define DAQ_DC_RATIO_IDLE_TIME_MSK   (0xFF << 0)

DAQ duty cycle ratio settings.

Specified settings for duty cycle ratio of DAQ Click driver.

◆ DAQ_DIG_DIAG_ERR_FUSE_CRC

#define DAQ_DIG_DIAG_ERR_FUSE_CRC ( x)    (((x) & 0x1) << 2)

◆ DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK

#define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK   (0x1 << 2)

◆ DAQ_DIG_DIAG_ERR_MEMMAP_CRC

#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC ( x)    (((x) & 0x1) << 4)

◆ DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK

#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK   (0x1 << 4)

DAQ diagnostic enable settings.

Specified settings for diagnostic enable of DAQ Click driver.

◆ DAQ_DIG_DIAG_ERR_RAM_CRC

#define DAQ_DIG_DIAG_ERR_RAM_CRC ( x)    (((x) & 0x1) << 3)

◆ DAQ_DIG_DIAG_ERR_RAM_CRC_MSK

#define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK   (0x1 << 3)

◆ DAQ_DIG_DIAG_FREQ_COUNT_EN

#define DAQ_DIG_DIAG_FREQ_COUNT_EN ( x)    (((x) & 0x1) << 0)

◆ DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK

#define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK   (0x1 << 0)

◆ DAQ_DIG_FUS_CRC_ERROR_MSK

#define DAQ_DIG_FUS_CRC_ERROR_MSK   (0x1 << 2)

◆ DAQ_DIG_MEMMAP_CRC_ERROR_MSK

#define DAQ_DIG_MEMMAP_CRC_ERROR_MSK   (0x1 << 4)

DAQ diagnostic status.

Specified diagnostic status of DAQ Click driver.

◆ DAQ_DIG_RAM_CRC_ERROR_MSK

#define DAQ_DIG_RAM_CRC_ERROR_MSK   (0x1 << 3)

◆ DAQ_DIGI_FILTER_60HZ_REJ_EN

#define DAQ_DIGI_FILTER_60HZ_REJ_EN ( x)    (((x) & 0x1) << 7)

◆ DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK

#define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK   (0x1 << 7)

DAQ digital filter settings.

Specified settings for digital filter of DAQ Click driver.

◆ DAQ_DIGI_FILTER_DEC_RATE

#define DAQ_DIGI_FILTER_DEC_RATE ( x)    (((x) & 0x7) << 0)

◆ DAQ_DIGI_FILTER_DEC_RATE_MSK

#define DAQ_DIGI_FILTER_DEC_RATE_MSK   (0x7 << 0)

◆ DAQ_DIGI_FILTER_FILTER

#define DAQ_DIGI_FILTER_FILTER ( x)    (((x) & 0x7) << 4)

◆ DAQ_DIGI_FILTER_FILTER_MSK

#define DAQ_DIGI_FILTER_FILTER_MSK   (0x7 << 4)

◆ DAQ_GAIN_HI

#define DAQ_GAIN_HI ( x)    (((x) & 0xFF) << 0)

◆ DAQ_GAIN_HI_MSK

#define DAQ_GAIN_HI_MSK   (0xFF << 0)

DAQ gain settings.

Specified settings for gain of DAQ Click driver.

◆ DAQ_GAIN_LOW

#define DAQ_GAIN_LOW ( x)    (((x) & 0xFF) << 0)

◆ DAQ_GAIN_LOW_MSK

#define DAQ_GAIN_LOW_MSK   (0xFF << 0)

◆ DAQ_GAIN_MID

#define DAQ_GAIN_MID ( x)    (((x) & 0xFF) << 0)

◆ DAQ_GAIN_MID_MSK

#define DAQ_GAIN_MID_MSK   (0xFF << 0)

◆ DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN

#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN ( x)    (((x) & 0x7) << 4)

◆ DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK

#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK   (0x7 << 4)

◆ DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN

#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN ( x)    (((x) & 0xF) << 0)

◆ DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK

#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK   (0xF << 0)

◆ DAQ_GPIO_CNTRL_GPIO0_OD_EN

#define DAQ_GPIO_CNTRL_GPIO0_OD_EN ( x)    (((x) & 0x1) << 4)

◆ DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK   (0x1 << 4)

◆ DAQ_GPIO_CNTRL_GPIO0_OP_EN

#define DAQ_GPIO_CNTRL_GPIO0_OP_EN ( x)    (((x) & 0x1) << 0)

◆ DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK   (0x1 << 0)

◆ DAQ_GPIO_CNTRL_GPIO1_OD_EN

#define DAQ_GPIO_CNTRL_GPIO1_OD_EN ( x)    (((x) & 0x1) << 5)

◆ DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK   (0x1 << 5)

◆ DAQ_GPIO_CNTRL_GPIO1_OP_EN

#define DAQ_GPIO_CNTRL_GPIO1_OP_EN ( x)    (((x) & 0x1) << 1)

◆ DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK   (0x1 << 1)

◆ DAQ_GPIO_CNTRL_GPIO2_OD_EN

#define DAQ_GPIO_CNTRL_GPIO2_OD_EN ( x)    (((x) & 0x1) << 6)

◆ DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK   (0x1 << 6)

◆ DAQ_GPIO_CNTRL_GPIO2_OP_EN

#define DAQ_GPIO_CNTRL_GPIO2_OP_EN ( x)    (((x) & 0x1) << 2)

◆ DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK   (0x1 << 2)

◆ DAQ_GPIO_CNTRL_GPIO3_OP_EN

#define DAQ_GPIO_CNTRL_GPIO3_OP_EN ( x)    (((x) & 0x1) << 3)

◆ DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK

#define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK   (0x1 << 3)

◆ DAQ_GPIO_CNTRL_UGPIO_EN

#define DAQ_GPIO_CNTRL_UGPIO_EN ( x)    (((x) & 0x1) << 7)

◆ DAQ_GPIO_CNTRL_UGPIO_EN_MSK

#define DAQ_GPIO_CNTRL_UGPIO_EN_MSK   (0x1 << 7)

DAQ gpio control settings.

Specified settings for gpio control of DAQ Click driver.

◆ DAQ_GPIO_READ_0_MSK

#define DAQ_GPIO_READ_0_MSK   (0x1 << 0)

◆ DAQ_GPIO_READ_1_MSK

#define DAQ_GPIO_READ_1_MSK   (0x1 << 1)

◆ DAQ_GPIO_READ_2_MSK

#define DAQ_GPIO_READ_2_MSK   (0x1 << 2)

◆ DAQ_GPIO_READ_3_MSK

#define DAQ_GPIO_READ_3_MSK   (0x1 << 3)

◆ DAQ_GPIO_READ_ALL_MSK

#define DAQ_GPIO_READ_ALL_MSK   (0xF << 0)

◆ DAQ_GPIO_WRITE_0

#define DAQ_GPIO_WRITE_0 ( x)    (((x) & 0x1) << 0)

◆ DAQ_GPIO_WRITE_0_MSK

#define DAQ_GPIO_WRITE_0_MSK   (0x1 << 0)

◆ DAQ_GPIO_WRITE_1

#define DAQ_GPIO_WRITE_1 ( x)    (((x) & 0x1) << 1)

◆ DAQ_GPIO_WRITE_1_MSK

#define DAQ_GPIO_WRITE_1_MSK   (0x1 << 1)

◆ DAQ_GPIO_WRITE_2

#define DAQ_GPIO_WRITE_2 ( x)    (((x) & 0x1) << 2)

◆ DAQ_GPIO_WRITE_2_MSK

#define DAQ_GPIO_WRITE_2_MSK   (0x1 << 2)

◆ DAQ_GPIO_WRITE_3

#define DAQ_GPIO_WRITE_3 ( x)    (((x) & 0x1) << 3)

◆ DAQ_GPIO_WRITE_3_MSK

#define DAQ_GPIO_WRITE_3_MSK   (0x1 << 3)

◆ DAQ_GPIO_WRITE_ALL

#define DAQ_GPIO_WRITE_ALL ( x)    (((x) & 0xF))

◆ DAQ_GPIO_WRITE_ALL_MSK

#define DAQ_GPIO_WRITE_ALL_MSK   (0xF << 0)

◆ DAQ_INTERFACE_CONT_READ_EN

#define DAQ_INTERFACE_CONT_READ_EN ( x)    (((x) & 0x1) << 0)

◆ DAQ_INTERFACE_CONT_READ_MSK

#define DAQ_INTERFACE_CONT_READ_MSK   (0x1 << 0)

◆ DAQ_INTERFACE_CONVLEN

#define DAQ_INTERFACE_CONVLEN ( x)    (((x) & 0x1) << 3)

◆ DAQ_INTERFACE_CONVLEN_MSK

#define DAQ_INTERFACE_CONVLEN_MSK   (0x1 << 3)

◆ DAQ_INTERFACE_CRC_EN

#define DAQ_INTERFACE_CRC_EN ( x)    (((x) & 0x1) << 6)

◆ DAQ_INTERFACE_CRC_EN_MSK

#define DAQ_INTERFACE_CRC_EN_MSK   (0x1 << 6)

DAQ inteface format settings.

Specified settings for inteface format of DAQ Click driver.

◆ DAQ_INTERFACE_CRC_TYPE

#define DAQ_INTERFACE_CRC_TYPE ( x)    (((x) & 0x1) << 5)

◆ DAQ_INTERFACE_CRC_TYPE_MSK

#define DAQ_INTERFACE_CRC_TYPE_MSK   (0x1 << 5)

◆ DAQ_INTERFACE_RDY_EN

#define DAQ_INTERFACE_RDY_EN ( x)    (((x) & 0x1) << 3)

◆ DAQ_INTERFACE_RDY_EN_MSK

#define DAQ_INTERFACE_RDY_EN_MSK   (0x1 << 2)

◆ DAQ_INTERFACE_STATUS_EN

#define DAQ_INTERFACE_STATUS_EN ( x)    (((x) & 0x1) << 4)

◆ DAQ_INTERFACE_STATUS_EN_MSK

#define DAQ_INTERFACE_STATUS_EN_MSK   (0x1 << 4)

◆ DAQ_MASTER_ADC_ERROR_MSK

#define DAQ_MASTER_ADC_ERROR_MSK   (0x1 << 6)

◆ DAQ_MASTER_DIG_ERR_EXT_CLK_MSK

#define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK   (0x1 << 4)

◆ DAQ_MASTER_DIG_ERROR_MSK

#define DAQ_MASTER_DIG_ERROR_MSK   (0x1 << 5)

◆ DAQ_MASTER_ERROR_MSK

#define DAQ_MASTER_ERROR_MSK   (0x1 << 7)

DAQ master status.

Specified master status of DAQ Click driver.

◆ DAQ_MASTER_FILT_NOT_SET_MSK

#define DAQ_MASTER_FILT_NOT_SET_MSK   (0x1 << 2)

◆ DAQ_MASTER_FILT_SAT_MSK

#define DAQ_MASTER_FILT_SAT_MSK   (0x1 << 3)

◆ DAQ_MASTER_POR_FLAG_MSK

#define DAQ_MASTER_POR_FLAG_MSK   (0x1 << 0)

◆ DAQ_MASTER_SPI_ERROR_MSK

#define DAQ_MASTER_SPI_ERROR_MSK   (0x1 << 1)

◆ DAQ_MCLK_COUNTER

#define DAQ_MCLK_COUNTER ( x)    (((x) & 0xFF) << 0)

◆ DAQ_MCLK_COUNTER_MSK

#define DAQ_MCLK_COUNTER_MSK   (0xFF << 0)

DAQ mclk counter settings.

Specified settings for mclk counter of DAQ Click driver.

◆ DAQ_OFFSET_HI

#define DAQ_OFFSET_HI ( x)    (((x) & 0xFF) << 0)

◆ DAQ_OFFSET_HI_MSK

#define DAQ_OFFSET_HI_MSK   (0xFF << 0)

DAQ offset settings.

Specified settings for offset of DAQ Click driver.

◆ DAQ_OFFSET_LO

#define DAQ_OFFSET_LO ( x)    (((x) & 0xFF) << 0)

◆ DAQ_OFFSET_LO_MSK

#define DAQ_OFFSET_LO_MSK   (0xFF << 0)

◆ DAQ_OFFSET_MID

#define DAQ_OFFSET_MID ( x)    (((x) & 0xFF) << 0)

◆ DAQ_OFFSET_MID_MSK

#define DAQ_OFFSET_MID_MSK   (0xFF << 0)

◆ DAQ_POWER_CLK_CLOCK_SEL

#define DAQ_POWER_CLK_CLOCK_SEL ( x)    (((x) & 0x3) << 6)

◆ DAQ_POWER_CLK_CLOCK_SEL_MSK

#define DAQ_POWER_CLK_CLOCK_SEL_MSK   (0x3 << 6)

◆ DAQ_POWER_CLK_MCLK_DIV

#define DAQ_POWER_CLK_MCLK_DIV ( x)    (((x) & 0x3) << 4)

◆ DAQ_POWER_CLK_MCLK_DIV_MSK

#define DAQ_POWER_CLK_MCLK_DIV_MSK   (0x3 << 4)

◆ DAQ_POWER_CLK_MOD_OUT

#define DAQ_POWER_CLK_MOD_OUT ( x)    (((x) & 0x1) << 2)

◆ DAQ_POWER_CLK_MOD_OUT_MSK

#define DAQ_POWER_CLK_MOD_OUT_MSK   (0x1 << 2)

◆ DAQ_POWER_CLK_POWER_DOWN

#define DAQ_POWER_CLK_POWER_DOWN   0x08

◆ DAQ_POWER_CLK_PWRMODE

#define DAQ_POWER_CLK_PWRMODE ( x)    (((x) & 0x3) << 0)

◆ DAQ_POWER_CLK_PWRMODE_MSK

#define DAQ_POWER_CLK_PWRMODE_MSK   0x3

DAQ power clock settings.

Specified settings for power clock of DAQ Click driver.

◆ DAQ_RESOLUTION

#define DAQ_RESOLUTION   8388608

DAQ resolution settings.

Specified settings for resolution of DAQ Click driver.

◆ DAQ_SINC3_DEC_RATE_LSB

#define DAQ_SINC3_DEC_RATE_LSB ( x)    (((x) & 0xFF) << 0)

◆ DAQ_SINC3_DEC_RATE_LSB_MSK

#define DAQ_SINC3_DEC_RATE_LSB_MSK   (0xFF << 0)

◆ DAQ_SINC3_DEC_RATE_MSB

#define DAQ_SINC3_DEC_RATE_MSB ( x)    (((x) & 0x0F) << 0)

◆ DAQ_SINC3_DEC_RATE_MSB_MSK

#define DAQ_SINC3_DEC_RATE_MSB_MSK   (0x0F << 0)

DAQ sinc3 decimal rate settings.

Specified settings for digital filter of DAQ Click driver.

◆ DAQ_SPI_CLK_CNT_ERROR_MSK

#define DAQ_SPI_CLK_CNT_ERROR_MSK   (0x1 << 3)

◆ DAQ_SPI_CRC_ERROR_CLR

#define DAQ_SPI_CRC_ERROR_CLR ( x)    (((x) & 0x1) << 0)

◆ DAQ_SPI_CRC_ERROR_MSK

#define DAQ_SPI_CRC_ERROR_MSK   (0x1 << 0)

◆ DAQ_SPI_DIAG_ERR_SPI_CLK_CNT

#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT ( x)    (((x) & 0x1) << 3)

◆ DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK

#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK   (0x1 << 3)

◆ DAQ_SPI_DIAG_ERR_SPI_IGNORE

#define DAQ_SPI_DIAG_ERR_SPI_IGNORE ( x)    (((x) & 0x1) << 4)

◆ DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK

#define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK   (0x1 << 4)

DAQ spi diagnostic enable settings.

Specified settings for spi diagnostic enable of DAQ Click driver.

◆ DAQ_SPI_DIAG_ERR_SPI_RD

#define DAQ_SPI_DIAG_ERR_SPI_RD ( x)    (((x) & 0x1) << 2)

◆ DAQ_SPI_DIAG_ERR_SPI_RD_MSK

#define DAQ_SPI_DIAG_ERR_SPI_RD_MSK   (0x1 << 2)

◆ DAQ_SPI_DIAG_ERR_SPI_WR

#define DAQ_SPI_DIAG_ERR_SPI_WR ( x)    (((x) & 0x1) << 1)

◆ DAQ_SPI_DIAG_ERR_SPI_WR_MSK

#define DAQ_SPI_DIAG_ERR_SPI_WR_MSK   (0x1 << 1)

◆ DAQ_SPI_IGNORE_ERROR_CLR

#define DAQ_SPI_IGNORE_ERROR_CLR ( x)    (((x) & 0x1) << 4)

◆ DAQ_SPI_IGNORE_ERROR_MSK

#define DAQ_SPI_IGNORE_ERROR_MSK   (0x1 << 4)

DAQ spi status.

Specified spi status of DAQ Click driver.

◆ DAQ_SPI_READ_ERROR_CLR

#define DAQ_SPI_READ_ERROR_CLR ( x)    (((x) & 0x1) << 2)

◆ DAQ_SPI_READ_ERROR_MSK

#define DAQ_SPI_READ_ERROR_MSK   (0x1 << 2)

◆ DAQ_SPI_WRITE_ERROR_CLR

#define DAQ_SPI_WRITE_ERROR_CLR ( x)    (((x) & 0x1) << 1)

◆ DAQ_SPI_WRITE_ERROR_MSK

#define DAQ_SPI_WRITE_ERROR_MSK   (0x1 << 1)

◆ DAQ_SYNC_RST_GPIO_START_EN

#define DAQ_SYNC_RST_GPIO_START_EN ( x)    (((x) & 0x1) << 3)

◆ DAQ_SYNC_RST_GPIO_START_EN_MSK

#define DAQ_SYNC_RST_GPIO_START_EN_MSK   (0x1 << 3)

◆ DAQ_SYNC_RST_SPI_RESET

#define DAQ_SYNC_RST_SPI_RESET ( x)    (((x) & 0x3) << 0)

◆ DAQ_SYNC_RST_SPI_RESET_MSK

#define DAQ_SYNC_RST_SPI_RESET_MSK   (0x3 << 0)

◆ DAQ_SYNC_RST_SPI_STARTB

#define DAQ_SYNC_RST_SPI_STARTB ( x)    (((x) & 0x1) << 7)

◆ DAQ_SYNC_RST_SPI_STARTB_MSK

#define DAQ_SYNC_RST_SPI_STARTB_MSK   (0x1 << 7)

DAQ sync reset settings.

Specified settings for sync reset of DAQ Click driver.

◆ DAQ_SYNC_RST_SYNCOUT_EDGE

#define DAQ_SYNC_RST_SYNCOUT_EDGE ( x)    (((x) & 0x1) << 6)

◆ DAQ_SYNC_RST_SYNCOUT_EDGE_MSK

#define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK   (0x1 << 6)

Enumeration Type Documentation

◆ daq_ain_precharge

DAQ AIN precharge values.

Specified values for AIN precharge of DAQ Click driver.

Enumerator
DAQ_AIN_ENABLED 
DAQ_AIN_DISABLED 

◆ daq_continuous_read

DAQ continuous adc read enable values.

Specified values for continuous adc read enable of DAQ Click driver.

Enumerator
DAQ_CONTINUOUS_READ_ENABLE 
DAQ_CONTINUOUS_READ_DISABLE 

◆ daq_conv_diag_mux

DAQ conversion mux values.

Specified values for conversion mux of DAQ Click driver.

Enumerator
DAQ_TEMP_SENSOR 
DAQ_AIN_SHORT 
DAQ_POSITIVE_FS 
DAQ_NEGATIVE_FS 

◆ daq_conv_len

DAQ conversion length values.

Specified values for conversion length of DAQ Click driver.

Enumerator
DAQ_CONV_24BIT 
DAQ_CONV_16BIT 

◆ daq_conv_mode

DAQ conversion mode values.

Specified values for conversion mode of DAQ Click driver.

Enumerator
DAQ_CONV_CONTINUOUS 
DAQ_CONV_ONE_SHOT 
DAQ_CONV_SINGLE 
DAQ_CONV_PERIODIC 
DAQ_CONV_STANDBY 

◆ daq_crc_sel

DAQ crc selection values.

Specified values for crc selection of DAQ Click driver.

Enumerator
DAQ_CRC 
DAQ_XOR 
DAQ_NO_CRC 

◆ daq_filter_type

DAQ filter type selection values.

Specified values for filter type selection of DAQ Click driver.

Enumerator
DAQ_SINC5 
DAQ_SINC5_DECx8 
DAQ_SINC5_DECx16 
DAQ_SINC3 
DAQ_FIR 

◆ daq_gain

enum daq_gain

DAQ GAIN configuration values.

Specified values for GAIN configuration of DAQ Click driver.

Enumerator
DAQ_GAIN_12p603 
DAQ_GAIN_6p302 
DAQ_GAIN_3p151 
DAQ_GAIN_1p575 
DAQ_GAIN_p788 
DAQ_GAIN_p394 
DAQ_GAIN_p197 

◆ daq_gobal_gpio_enable

DAQ global gpio values.

Specified values for global gpio of DAQ Click driver.

Enumerator
DAQ_GLOBAL_GPIO_ENABLE 
DAQ_GLOBAL_GPIO_DISABLE 

◆ daq_gpio_output_type

DAQ gpio output type values.

Specified values for gpio output type of DAQ Click driver.

Enumerator
DAQ_GPIO_STRONG_DRIVER 
DAQ_GPIO_OPEN_DRAIN 

◆ daq_gpio_write

DAQ gpio state values.

Specified values for gpio state of DAQ Click driver.

Enumerator
DAQ_GPIO_LOW 
DAQ_GPIO_HIGH 

◆ daq_gpios

enum daq_gpios

DAQ global gpio numbering values.

Specified values for global gpio numbering of DAQ Click driver.

Enumerator
DAQ_GPIO0 
DAQ_GPIO1 
DAQ_GPIO2 
DAQ_GPIO3 
DAQ_ALL_GPIOS 

◆ daq_mclk_div

DAQ mclk divider values.

Specified values for mclk divider of DAQ Click driver.

Enumerator
DAQ_MCLK_DIV_16 
DAQ_MCLK_DIV_8 
DAQ_MCLK_DIV_4 
DAQ_MCLK_DIV_2 

◆ daq_power_mode

DAQ power clock values.

Specified values for power clock of DAQ Click driver.

Enumerator
DAQ_ECO 
DAQ_MEDIAN 
DAQ_FAST 

◆ daq_rdy_dout

DAQ data ready enable values.

Specified values for data ready enable of DAQ Click driver.

Enumerator
DAQ_RDY_DOUT_EN 
DAQ_RDY_DOUT_DIS 

◆ daq_ref_buffer

DAQ REF buffer values.

Specified values for REF buffer of DAQ Click driver.

Enumerator
DAQ_BUF_ENABLED 
DAQ_BUF_DISABLED 
DAQ_BUF_FULL_BUFFER_ON 

◆ daq_sinc5_fir_decimate

DAQ Decimation ratios for SINC5 and FIR values.

Specified values for decimation ratios for SINC5 and FIR of DAQ Click driver.

Enumerator
DAQ_SINC5_FIR_DECx32 
DAQ_SINC5_FIR_DECx64 
DAQ_SINC5_FIR_DECx128 
DAQ_SINC5_FIR_DECx256 
DAQ_SINC5_FIR_DECx512 
DAQ_SINC5_FIR_DECx1024 

◆ daq_sleep_wake

DAQ power values.

Specified values for power of DAQ Click driver.

Enumerator
DAQ_SLEEP 
DAQ_WAKE 

◆ daq_vcm_out

DAQ VCM output voltage values.

Specified values for VCM output voltage of DAQ Click driver.

Enumerator
DAQ_VCM_HALF_VCC 
DAQ_VCM_2_5V 
DAQ_VCM_2_05V 
DAQ_VCM_1_9V 
DAQ_VCM_1_65V 
DAQ_VCM_1_1V 
DAQ_VCM_0_9V 
DAQ_VCM_OFF