30#include "common/tusb_common.h"
32#include "common/tusb_fifo.h"
42#ifndef CFG_TUD_ENDPPOINT_MAX
43 #define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX
52 DCD_EVENT_INVALID = 0,
59 DCD_EVENT_SETUP_RECEIVED,
60 DCD_EVENT_XFER_COMPLETE,
68typedef struct TU_ATTR_ALIGNED(4)
111void dcd_dcache_clean(
void const* addr, uint32_t data_size) TU_ATTR_WEAK;
115void dcd_dcache_invalidate(
void const* addr, uint32_t data_size) TU_ATTR_WEAK;
119void dcd_dcache_clean_invalidate(
void const* addr, uint32_t data_size) TU_ATTR_WEAK;
126void dcd_init (uint8_t rhport);
129void dcd_int_handler(uint8_t rhport);
132void dcd_int_enable (uint8_t rhport);
135void dcd_int_disable(uint8_t rhport);
138void dcd_set_address(uint8_t rhport, uint8_t dev_addr);
141void dcd_remote_wakeup(uint8_t rhport);
144void dcd_connect(uint8_t rhport) TU_ATTR_WEAK;
147void dcd_disconnect(uint8_t rhport) TU_ATTR_WEAK;
150void dcd_sof_enable(uint8_t rhport,
bool en);
166void dcd_edpt_close_all (uint8_t rhport);
170void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
173bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
177bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr,
tu_fifo_t * ff, uint16_t total_bytes) TU_ATTR_WEAK;
180void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr);
184void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr);
188TU_ATTR_WEAK
bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
191TU_ATTR_WEAK
bool dcd_edpt_iso_activate(uint8_t rhport,
tusb_desc_endpoint_t const * p_endpoint_desc);
198extern void dcd_event_handler(dcd_event_t
const * event,
bool in_isr);
201TU_ATTR_ALWAYS_INLINE
static inline void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid,
bool in_isr)
203 dcd_event_t
event = { .rhport = rhport, .event_id = eid };
204 dcd_event_handler(&event, in_isr);
208TU_ATTR_ALWAYS_INLINE
static inline void dcd_event_bus_reset (uint8_t rhport,
tusb_speed_t speed,
bool in_isr)
210 dcd_event_t
event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET };
211 event.bus_reset.speed = speed;
212 dcd_event_handler(&event, in_isr);
216TU_ATTR_ALWAYS_INLINE
static inline void dcd_event_setup_received(uint8_t rhport, uint8_t
const * setup,
bool in_isr)
218 dcd_event_t
event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED };
221 dcd_event_handler(&event, in_isr);
225TU_ATTR_ALWAYS_INLINE
static inline void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result,
bool in_isr)
227 dcd_event_t
event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE };
229 event.xfer_complete.ep_addr = ep_addr;
230 event.xfer_complete.len = xferred_bytes;
231 event.xfer_complete.result = result;
233 dcd_event_handler(&event, in_isr);
236static inline void dcd_event_sof(uint8_t rhport, uint32_t frame_count,
bool in_isr)
238 dcd_event_t
event = { .rhport = rhport, .event_id = DCD_EVENT_SOF };
239 event.sof.frame_count = frame_count;
240 dcd_event_handler(&event, in_isr);
tusb_speed_t
defined base on EHCI specs value for Endpoint Speed
Definition tusb_types.h:48
AUDIO Channel Cluster Descriptor (4.1)
Definition audio.h:647
Definition tusb_fifo.h:108