dram.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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****************************************************************************/
 
#ifndef DRAM_H
#define DRAM_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define DRAM_CMD_READ                   0x03
#define DRAM_CMD_FAST_READ              0x0B
#define DRAM_CMD_WRITE                  0x02
#define DRAM_CMD_RESET_ENABLE           0x66
#define DRAM_CMD_RESET                  0x99
#define DRAM_CMD_WRAP_BOUNDARY_TOGGLE   0xC0
#define DRAM_CMD_READ_ID                0x9F
 
 // dram_reg
 
#define DRAM_MIN_ADDRESS                0x000000
#define DRAM_MAX_ADDRESS                0x7FFFFFul
 
#define DRAM_MANUFACTURER_ID            0x0D
 
#define DRAM_SET_DATA_SAMPLE_EDGE       SET_SPI_DATA_SAMPLE_EDGE
#define DRAM_SET_DATA_SAMPLE_MIDDLE     SET_SPI_DATA_SAMPLE_MIDDLE
 
 // dram_set
 
#define DRAM_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.io2 = MIKROBUS( mikrobus, MIKROBUS_PWM );
 
 // dram_map
 // dram
 
typedef struct
{
    // Output pins
    digital_out_t io3;          
    digital_out_t io2;          
    // Modules
    spi_master_t spi;           
    pin_name_t   chip_select;   
} dram_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t miso;            
    pin_name_t mosi;            
    pin_name_t sck;             
    pin_name_t cs;              
    // Additional gpio pins
    pin_name_t io3;             
    pin_name_t io2;             
    // static variable
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
} dram_cfg_t;
 
typedef enum
{
    DRAM_OK = 0,
    DRAM_ERROR = -1
 
} dram_return_value_t;
 
void dram_cfg_setup ( dram_cfg_t *cfg );
 
err_t dram_init ( dram_t *ctx, dram_cfg_t *cfg );
 
err_t dram_memory_write ( dram_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len );
 
err_t dram_memory_read ( dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
 
err_t dram_memory_read_fast ( dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
 
err_t dram_reset ( dram_t *ctx );
 
err_t dram_toggle_wrap_boundary ( dram_t *ctx );
 
err_t dram_read_id ( dram_t *ctx, uint8_t *device_id );
 
err_t dram_check_communication ( dram_t *ctx );
 
void dram_set_io3_pin ( dram_t *ctx, uint8_t state );
 
void dram_set_io2_pin ( dram_t *ctx, uint8_t state );
 
#ifdef __cplusplus
}
#endif
#endif // DRAM_H
 
 // dram
 
// ------------------------------------------------------------------------ END