Macros
#define	ECG3_NO_OP_REG 0x00

#define	ECG3_STAT_REG 0x01

#define	ECG3_EN_INT_REG 0x02

#define	ECG3_EN_INT2_REG 0x03

#define	ECG3_MNGR_INT_REG 0x04

#define	ECG3_MNGR_DYN_REG 0x05

#define	ECG3_SW_RST_REG 0x08

#define	ECG3_SYNC_REG 0x09

#define	ECG3_FIFO_RST_REG 0x0A

#define	ECG3_INFO_REG 0x0F

#define	ECG3_CNFG_GEN_REG 0x10

#define	ECG3_CNFG_CAL_REG 0x12

#define	ECG3_CNFG_EMUX_REG 0x14

#define	ECG3_CNFG_ECG_REG 0x15

#define	ECG3_CNFG_RTOR1_REG 0x1D

#define	ECG3_CNFG_RTOR2_REG 0x1E

#define	ECG3_ECG_FIFO_BURST_REG 0x20

#define	ECG3_ECG_FIFO_REG 0x21

#define	ECG3_RTOR_REG 0x25

#define	ECG3_NO_OP2_REG 0x7F

Detailed Description

Macro Definition Documentation

◆ ECG3_CNFG_CAL_REG

#define ECG3_CNFG_CAL_REG 0x12

◆ ECG3_CNFG_ECG_REG

#define ECG3_CNFG_ECG_REG 0x15

◆ ECG3_CNFG_EMUX_REG

#define ECG3_CNFG_EMUX_REG 0x14

◆ ECG3_CNFG_GEN_REG

#define ECG3_CNFG_GEN_REG 0x10

◆ ECG3_CNFG_RTOR1_REG

#define ECG3_CNFG_RTOR1_REG 0x1D

◆ ECG3_CNFG_RTOR2_REG

#define ECG3_CNFG_RTOR2_REG 0x1E

◆ ECG3_ECG_FIFO_BURST_REG

#define ECG3_ECG_FIFO_BURST_REG 0x20

◆ ECG3_ECG_FIFO_REG

#define ECG3_ECG_FIFO_REG 0x21

◆ ECG3_EN_INT2_REG

#define ECG3_EN_INT2_REG 0x03

◆ ECG3_EN_INT_REG

#define ECG3_EN_INT_REG 0x02

◆ ECG3_FIFO_RST_REG

#define ECG3_FIFO_RST_REG 0x0A

◆ ECG3_INFO_REG

#define ECG3_INFO_REG 0x0F

◆ ECG3_MNGR_DYN_REG

#define ECG3_MNGR_DYN_REG 0x05

◆ ECG3_MNGR_INT_REG

#define ECG3_MNGR_INT_REG 0x04

◆ ECG3_NO_OP2_REG

#define ECG3_NO_OP2_REG 0x7F

◆ ECG3_NO_OP_REG

#define ECG3_NO_OP_REG 0x00

◆ ECG3_RTOR_REG

#define ECG3_RTOR_REG 0x25

◆ ECG3_STAT_REG

#define ECG3_STAT_REG 0x01

◆ ECG3_SW_RST_REG

#define ECG3_SW_RST_REG 0x08

◆ ECG3_SYNC_REG

#define ECG3_SYNC_REG 0x09

Macros