eeprom5.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef EEPROM5_H
#define EEPROM5_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
 
#define EEPROM5_CMD_WREN                                          0x06
#define EEPROM5_CMD_WRDI                                          0x04
#define EEPROM5_CMD_RDSR                                          0x05
#define EEPROM5_CMD_WRSR                                          0x01
#define EEPROM5_CMD_READ                                          0x03
#define EEPROM5_CMD_WRITE                                         0x02
#define EEPROM5_CMD_READ_ID                                       0x83
#define EEPROM5_CMD_WRITE_ID                                      0x82
#define EEPROM5_CMD_READ_LOCK_STATUS                              0x83
#define EEPROM5_CMD_LOCK_ID                                       0x82
 
#define EEPROM5_WRITE_MEMORY_DISABLE                              0x00
#define EEPROM5_WRITE_MEMORY_ENABLE                               0x01
 
#define EEPROM5_IDENT_PAGE_ADDR_START                           0x0000
#define EEPROM5_IDENT_PAGE_ADDR_END                             0x01FF
 
#define EEPROM5_SIGNIFICANT_ADDR_BIT_0                            0xFB
#define EEPROM5_SIGNIFICANT_ADDR_BIT_1                            0x04
 
#define EEPROM5_MEMORY_ADDR_START                           0x00000000ul
#define EEPROM5_MEMORY_ADDR_END                             0x0007FFFFul
 
#define EEPROM5_HOLD_DISABLE                                      0x00
#define EEPROM5_HOLD_ENABLE                                       0x01
 
#define EEPROM5_WRITE_PROTECT_DISABLE                             0x00
#define EEPROM5_WRITE_PROTECT_ENABLE                              0x01
 
#define EEPROM5_DUMMY                                             0xFF
 
 // eeprom5_set
 
#define EEPROM5_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.hld = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM )
 
 // eeprom5_map
 // eeprom5
 
typedef struct
{
    // Output pins
    digital_out_t  hld;         
    digital_out_t  wp;          
    // Modules
    spi_master_t  spi;          
    pin_name_t  chip_select;    
} eeprom5_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t  miso;           
    pin_name_t  mosi;           
    pin_name_t  sck;            
    pin_name_t  cs;             
    // Additional gpio pins
    pin_name_t  hld;            
    pin_name_t  wp;             
    // static variable
    uint32_t                           spi_speed;       
    spi_master_mode_t                  spi_mode;        
    spi_master_chip_select_polarity_t  cs_polarity;     
} eeprom5_cfg_t;
 
typedef struct
{
    uint8_t write_in_progress;
    uint8_t write_enable_latch;
    uint8_t block_protect;
    uint8_t write_protect;
    
} status_data_t;
 
typedef enum
{
   EEPROM5_OK = 0,
   EEPROM5_ERROR = -1
 
} eeprom5_return_value_t;
 
void eeprom5_cfg_setup ( eeprom5_cfg_t *cfg );
 
err_t eeprom5_init ( eeprom5_t *ctx, eeprom5_cfg_t *cfg );
 
void eeprom5_generic_write ( eeprom5_t *ctx, uint32_t addr, uint8_t tx_data );
 
uint8_t eeprom5_generic_read ( eeprom5_t *ctx, uint32_t addr );
 
void eeprom5_set_hold ( eeprom5_t *ctx, uint8_t en_hold );
 
void eeprom5_set_write_protect ( eeprom5_t *ctx, uint8_t en_wr_prot );
 
void eeprom5_send_cmd ( eeprom5_t *ctx, uint8_t cmd );
 
void eeprom5_enable_memory_write ( eeprom5_t *ctx, uint8_t en_wr_mem );
 
void eeprom5_get_status ( eeprom5_t *ctx, status_data_t *stat_data );
 
void eeprom5_set_status ( eeprom5_t *ctx, status_data_t stat_data );
 
void eeprom5_read_memory ( eeprom5_t *ctx, uint32_t addr, uint8_t *p_rx_data, uint8_t n_bytes );
 
void eeprom5_write_memory ( eeprom5_t *ctx, uint32_t addr, uint8_t *p_tx_data, uint8_t n_bytes );
 
uint8_t eeprom5_read_ident_page ( eeprom5_t *ctx, uint16_t addr );
 
void eeprom5_write_ident_page ( eeprom5_t *ctx, uint16_t addr, uint8_t ident_data );
 
uint8_t eeprom5_read_lock_status ( eeprom5_t *ctx );
 
void eeprom5_lock_id ( eeprom5_t *ctx, uint8_t lock_id );
 
#ifdef __cplusplus
}
#endif
#endif // EEPROM5_H
 
 // eeprom5
 
// ------------------------------------------------------------------------ END