eeram2.h

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/*
 * MikroSDK - MikroE Software Development Kit
 * Copyright© 2020 MikroElektronika d.o.o.
 * 
 * Permission is hereby granted, free of charge, to any person 
 * obtaining a copy of this software and associated documentation 
 * files (the "Software"), to deal in the Software without restriction, 
 * including without limitation the rights to use, copy, modify, merge, 
 * publish, distribute, sublicense, and/or sell copies of the Software, 
 * and to permit persons to whom the Software is furnished to do so, 
 * subject to the following conditions:
 * 
 * The above copyright notice and this permission notice shall be 
 * included in all copies or substantial portions of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
 * OR OTHER DEALINGS IN THE SOFTWARE. 
 */
 
// ----------------------------------------------------------------------------
 
#ifndef EERAM2_H
#define EERAM2_H
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
 
// -------------------------------------------------------------- PUBLIC MACROS 
#define EERAM2_MAP_MIKROBUS( cfg, mikrobus ) \
   cfg.miso  = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
   cfg.mosi  = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
   cfg.sck   = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
   cfg.cs    = MIKROBUS( mikrobus, MIKROBUS_CS ); \
   cfg.hld = MIKROBUS( mikrobus, MIKROBUS_PWM )
#define EERAM2_RETVAL  uint8_t
 
#define EERAM2_OK           0x00
#define EERAM2_INIT_ERROR   0xFF
#define EERAM2_CMD_WREN                                            0x06
#define EERAM2_CMD_WRDI                                            0x04
#define EERAM2_CMD_WRITE                                           0x02
#define EERAM2_CMD_READ                                            0x03
#define EERAM2_CMD_SECURE_WRITE                                    0x12
#define EERAM2_CMD_SECURE_READ                                     0x13
#define EERAM2_CMD_WRSR                                            0x01
#define EERAM2_CMD_RDSR                                            0x05
#define EERAM2_CMD_STORE                                           0x08
#define EERAM2_CMD_RECALL                                          0x09
#define EERAM2_CMD_WRNUR                                           0xC2
#define EERAM2_CMD_RDNUR                                           0xC3
#define EERAM2_CMD_HIBERNATE                                        0xB9
#define EERAM2_HOLD_DISABLE                                         0x00
#define EERAM2_HOLD_ENABLE                                          0x01
#define EERAM2_WRITE_DISABLE                                        0x00
#define EERAM2_WRITE_ENABLE                                         0x01
\
#define EERAM2_STATUS_ASE_ENABLE                                    0x00
#define EERAM2_STATUS_ASE_DISABLE                                   0x40
#define EERAM2_STATUS_BP_LVL_0                                      0x00
#define EERAM2_STATUS_BP_LVL_1                                      0x04
#define EERAM2_STATUS_BP_LVL_2                                      0x08
#define EERAM2_STATUS_BP_LVL_3                                      0x0C
#define EERAM2_ERROR                                                0x00
#define EERAM2_SUCCESS                                              0x01
#define EERAM2_SRAM_ADDR_FIRST                                      0x00000000
#define EERAM2_SRAM_ADDR_LAST                                       0x00FFFFFF
 // End group macro 
// --------------------------------------------------------------- PUBLIC TYPES
typedef struct
{
    // Output pins 
    digital_out_t cs;
    digital_out_t hld;
 
    // Modules 
 
    spi_master_t spi;
    pin_name_t chip_select;
 
} eeram2_t;
 
typedef struct
{
    // Communication gpio pins 
 
    pin_name_t miso;
    pin_name_t mosi;
    pin_name_t sck;
    pin_name_t cs;
 
    // Additional gpio pins 
 
    pin_name_t hld;
 
    // static variable 
 
    uint32_t spi_speed;
    spi_master_mode_t   spi_mode;
    spi_master_chip_select_polarity_t cs_polarity;
 
} eeram2_cfg_t;
 
 // End types group
 
// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
 
#ifdef __cplusplus
extern "C"{
#endif
 
void eeram2_cfg_setup ( eeram2_cfg_t *cfg );
 
EERAM2_RETVAL eeram2_init ( eeram2_t *ctx, eeram2_cfg_t *cfg );
 
void eeram2_generic_transfer ( eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf,  uint16_t rd_len );
 
void eeram2_set_on_hold_status ( eeram2_t *ctx, uint8_t en_hold );
 
void eeram2_set_command ( eeram2_t *ctx, uint8_t command );
 
void eeram2_set_write_status ( eeram2_t *ctx, uint8_t en_write );
 
void eeram2_set_status ( eeram2_t *ctx, uint8_t tx_data );
 
uint8_t eeram2_get_status ( eeram2_t *ctx );
 
uint8_t eeram2_write_byte ( eeram2_t *ctx, uint32_t reg, uint8_t tx_data );
 
uint8_t eeram2_read_byte ( eeram2_t *ctx, uint32_t reg );
 
uint8_t eeram2_write_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes );
 
uint8_t eeram2_read_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes );
 
uint8_t eeram2_read_nonvolatile ( eeram2_t *ctx, uint8_t *p_rx_data );
 
uint8_t eeram2_write_nonvolatile ( eeram2_t *ctx, uint8_t *p_tx_data );
 
uint8_t eeram2_secure_write ( eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data );
 
uint8_t eeram2_secure_read ( eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data );
 
#ifdef __cplusplus
}
#endif
#endif  // _EERAM2_H_
 
 // End public_function group
 
// ------------------------------------------------------------------------- END