eFuse 5 Registers Settings

Settings for registers of eFuse 5 Click driver. More...

Macros
#define	EFUSE5_OTP_V_READY   0x00
	eFuse 5 description OTP Validation Bits.
#define	EFUSE5_OTP_V_TEST_FUSE_OK   0x40
#define	EFUSE5_OTP_V_ERROR   0x80
#define	EFUSE5_OTP_V_PROG_SUCCESS   0xC0
#define	EFUSE5_DEVICE_ADDRESS   0x2C
	eFuse 5 device address setting.

Detailed Description

Settings for registers of eFuse 5 Click driver.

Macro Definition Documentation

EFUSE5_DEVICE_ADDRESS

#define EFUSE5_DEVICE_ADDRESS   0x2C

eFuse 5 device address setting.

Specified setting for device slave address selection of eFuse 5 Click driver.

EFUSE5_OTP_V_ERROR

#define EFUSE5_OTP_V_ERROR   0x80

EFUSE5_OTP_V_PROG_SUCCESS

#define EFUSE5_OTP_V_PROG_SUCCESS   0xC0

EFUSE5_OTP_V_READY

#define EFUSE5_OTP_V_READY   0x00

eFuse 5 description OTP Validation Bits.

Specified OTP Validation Bits for description of eFuse 5 Click driver.

EFUSE5_OTP_V_TEST_FUSE_OK

#define EFUSE5_OTP_V_TEST_FUSE_OK   0x40