Environment 3 Registers Settings

Settings for registers of Environment 3 Click driver. More...

Macros
#define	ENVIRONMENT3_CHIP_ID   0x61
	Environment 3 chip ID.
#define	ENVIRONMENT3_SOFT_RESET   0xB6
	Environment 3 reset settings.
#define	ENVIRONMENT3_E_NULL_PTR   -2
	Environment 3 errors summary.
#define	ENVIRONMENT3_E_COM_FAIL   -3
#define	ENVIRONMENT3_E_INVALID_LENGTH   -4
#define	ENVIRONMENT3_W_DEFINE_OP_MODE   1
#define	ENVIRONMENT3_W_NO_NEW_DATA   2
#define	ENVIRONMENT3_NBCONV_MASK   0x0F
	Environment 3 register mask summary.
#define	ENVIRONMENT3_FILTER_MASK   0x1C
#define	ENVIRONMENT3_ODR3_MASK   0x80
#define	ENVIRONMENT3_ODR20_MASK   0xE0
#define	ENVIRONMENT3_OST_MASK   0xE0
#define	ENVIRONMENT3_OSP_MASK   0x1C
#define	ENVIRONMENT3_OSH_MASK   0x07
#define	ENVIRONMENT3_HCTRL_MASK   0x08
#define	ENVIRONMENT3_RUN_GAS_MASK   0x30
#define	ENVIRONMENT3_MODE_MASK   0x03
#define	ENVIRONMENT3_RHRANGE_MASK   0x30
#define	ENVIRONMENT3_RSERROR_MASK   0xF0
#define	ENVIRONMENT3_NEW_DATA_MASK   0x80
#define	ENVIRONMENT3_GAS_INDEX_MASK   0x0F
#define	ENVIRONMENT3_GAS_RANGE_MASK   0x0F
#define	ENVIRONMENT3_GASM_VALID_MASK   0x20
#define	ENVIRONMENT3_HEAT_STAB_MASK   0x10
#define	ENVIRONMENT3_MEM_PAGE_MASK   0x10
#define	ENVIRONMENT3_BIT_H1_DATA_MASK   0x0F
#define	ENVIRONMENT3_HUM_REG_SHIFT_VAL_MASK   0x04
#define	ENVIRONMENT3_SPI_READ_MASK   0x80
#define	ENVIRONMENT3_SPI_WRITE_MASK   0x7F
#define	ENVIRONMENT3_FILTER_POS   2
	Environment 3 register bit position summary.
#define	ENVIRONMENT3_OST_POS   5
#define	ENVIRONMENT3_OSP_POS   2
#define	ENVIRONMENT3_ODR3_POS   7
#define	ENVIRONMENT3_ODR20_POS   5
#define	ENVIRONMENT3_RUN_GAS_POS   4
#define	ENVIRONMENT3_HCTRL_POS   3
#define	ENVIRONMENT3_ENABLE   0x01
	Environment 3 enable/disable macros.
#define	ENVIRONMENT3_DISABLE   0x00
#define	ENVIRONMENT3_ENABLE_HEATER   0x00
#define	ENVIRONMENT3_DISABLE_HEATER   0x01
#define	ENVIRONMENT3_ENABLE_GAS_MEAS_H   0x02
#define	ENVIRONMENT3_ENABLE_GAS_MEAS_L   0x01
#define	ENVIRONMENT3_DISABLE_GAS_MEAS   0x00
#define	ENVIRONMENT3_VARIANT_GAS_LOW   0x00
	Environment 3 variant ID macros.
#define	ENVIRONMENT3_VARIANT_GAS_HIGH   0x01
#define	ENVIRONMENT3_OS_NONE   0
	Environment 3 oversampling setting macros.
#define	ENVIRONMENT3_OS_1X   1
#define	ENVIRONMENT3_OS_2X   2
#define	ENVIRONMENT3_OS_4X   3
#define	ENVIRONMENT3_OS_8X   4
#define	ENVIRONMENT3_OS_16X   5
#define	ENVIRONMENT3_FILTER_OFF   0
	Environment 3 IIR Filter settings.
#define	ENVIRONMENT3_FILTER_SIZE_1   1
#define	ENVIRONMENT3_FILTER_SIZE_3   2
#define	ENVIRONMENT3_FILTER_SIZE_7   3
#define	ENVIRONMENT3_FILTER_SIZE_15   4
#define	ENVIRONMENT3_FILTER_SIZE_31   5
#define	ENVIRONMENT3_FILTER_SIZE_63   6
#define	ENVIRONMENT3_FILTER_SIZE_127   7
#define	ENVIRONMENT3_ODR_0_59_MS   0
	Environment 3 ODR/Standby time macros.
#define	ENVIRONMENT3_ODR_62_5_MS   1
#define	ENVIRONMENT3_ODR_125_MS   2
#define	ENVIRONMENT3_ODR_250_MS   3
#define	ENVIRONMENT3_ODR_500_MS   4
#define	ENVIRONMENT3_ODR_1000_MS   5
#define	ENVIRONMENT3_ODR_10_MS   6
#define	ENVIRONMENT3_ODR_20_MS   7
#define	ENVIRONMENT3_ODR_NONE   8
#define	ENVIRONMENT3_MODE_SLEEP   0
	Environment 3 operating mode selection settings.
#define	ENVIRONMENT3_MODE_FORCED   1
#define	ENVIRONMENT3_MEM_PAGE_0   0x10
	Environment 3 SPI page settings.
#define	ENVIRONMENT3_MEM_PAGE_1   0x00
#define	ENVIRONMENT3_LEN_COEFF_ALL   42
	Environment 3 buffer length macros.
#define	ENVIRONMENT3_LEN_COEFF_1   23
#define	ENVIRONMENT3_LEN_COEFF_2   14
#define	ENVIRONMENT3_LEN_COEFF_3   5
#define	ENVIRONMENT3_LEN_FIELD   17
#define	ENVIRONMENT3_LEN_CONFIG   5
#define	ENVIRONMENT3_LEN_INTERLEAVE_BUFF   20
#define	ENVIRONMENT3_IDX_T2_LSB   0
	Environment 3 coefficient index macros.
#define	ENVIRONMENT3_IDX_T2_MSB   1
#define	ENVIRONMENT3_IDX_T3   2
#define	ENVIRONMENT3_IDX_P1_LSB   4
#define	ENVIRONMENT3_IDX_P1_MSB   5
#define	ENVIRONMENT3_IDX_P2_LSB   6
#define	ENVIRONMENT3_IDX_P2_MSB   7
#define	ENVIRONMENT3_IDX_P3   8
#define	ENVIRONMENT3_IDX_P4_LSB   10
#define	ENVIRONMENT3_IDX_P4_MSB   11
#define	ENVIRONMENT3_IDX_P5_LSB   12
#define	ENVIRONMENT3_IDX_P5_MSB   13
#define	ENVIRONMENT3_IDX_P7   14
#define	ENVIRONMENT3_IDX_P6   15
#define	ENVIRONMENT3_IDX_P8_LSB   18
#define	ENVIRONMENT3_IDX_P8_MSB   19
#define	ENVIRONMENT3_IDX_P9_LSB   20
#define	ENVIRONMENT3_IDX_P9_MSB   21
#define	ENVIRONMENT3_IDX_P10   22
#define	ENVIRONMENT3_IDX_H2_MSB   23
#define	ENVIRONMENT3_IDX_H2_LSB   24
#define	ENVIRONMENT3_IDX_H1_LSB   24
#define	ENVIRONMENT3_IDX_H1_MSB   25
#define	ENVIRONMENT3_IDX_H3   26
#define	ENVIRONMENT3_IDX_H4   27
#define	ENVIRONMENT3_IDX_H5   28
#define	ENVIRONMENT3_IDX_H6   29
#define	ENVIRONMENT3_IDX_H7   30
#define	ENVIRONMENT3_IDX_T1_LSB   31
#define	ENVIRONMENT3_IDX_T1_MSB   32
#define	ENVIRONMENT3_IDX_GH2_LSB   33
#define	ENVIRONMENT3_IDX_GH2_MSB   34
#define	ENVIRONMENT3_IDX_GH1   35
#define	ENVIRONMENT3_IDX_GH3   36
#define	ENVIRONMENT3_IDX_RES_HEAT_VAL   37
#define	ENVIRONMENT3_IDX_RES_HEAT_RANGE   39
#define	ENVIRONMENT3_IDX_RANGE_SW_ERR   41
#define	ENVIRONMENT3_DEVICE_SLAVE_ADDR_0   0x76
	Environment 3 device address setting.
#define	ENVIRONMENT3_DEVICE_SLAVE_ADDR_1   0x77

Detailed Description

Settings for registers of Environment 3 Click driver.

Macro Definition Documentation

ENVIRONMENT3_BIT_H1_DATA_MASK

#define ENVIRONMENT3_BIT_H1_DATA_MASK   0x0F

ENVIRONMENT3_CHIP_ID

#define ENVIRONMENT3_CHIP_ID   0x61

Environment 3 chip ID.

Unique chip ID value.

ENVIRONMENT3_DEVICE_SLAVE_ADDR_0

#define ENVIRONMENT3_DEVICE_SLAVE_ADDR_0   0x76

Environment 3 device address setting.

Specified setting for device slave address selection of Environment 3 Click driver.

ENVIRONMENT3_DEVICE_SLAVE_ADDR_1

#define ENVIRONMENT3_DEVICE_SLAVE_ADDR_1   0x77

ENVIRONMENT3_DISABLE

#define ENVIRONMENT3_DISABLE   0x00

ENVIRONMENT3_DISABLE_GAS_MEAS

#define ENVIRONMENT3_DISABLE_GAS_MEAS   0x00

ENVIRONMENT3_DISABLE_HEATER

#define ENVIRONMENT3_DISABLE_HEATER   0x01

ENVIRONMENT3_E_COM_FAIL

#define ENVIRONMENT3_E_COM_FAIL   -3

ENVIRONMENT3_E_INVALID_LENGTH

#define ENVIRONMENT3_E_INVALID_LENGTH   -4

ENVIRONMENT3_E_NULL_PTR

#define ENVIRONMENT3_E_NULL_PTR   -2

Environment 3 errors summary.

The list of errors.

ENVIRONMENT3_ENABLE

#define ENVIRONMENT3_ENABLE   0x01

Environment 3 enable/disable macros.

Enable/disable macros.

ENVIRONMENT3_ENABLE_GAS_MEAS_H

#define ENVIRONMENT3_ENABLE_GAS_MEAS_H   0x02

ENVIRONMENT3_ENABLE_GAS_MEAS_L

#define ENVIRONMENT3_ENABLE_GAS_MEAS_L   0x01

ENVIRONMENT3_ENABLE_HEATER

#define ENVIRONMENT3_ENABLE_HEATER   0x00

ENVIRONMENT3_FILTER_MASK

#define ENVIRONMENT3_FILTER_MASK   0x1C

ENVIRONMENT3_FILTER_OFF

#define ENVIRONMENT3_FILTER_OFF   0

Environment 3 IIR Filter settings.

IIR Filter settings.

ENVIRONMENT3_FILTER_POS

#define ENVIRONMENT3_FILTER_POS   2

Environment 3 register bit position summary.

The list of bit position masks.

ENVIRONMENT3_FILTER_SIZE_1

#define ENVIRONMENT3_FILTER_SIZE_1   1

ENVIRONMENT3_FILTER_SIZE_127

#define ENVIRONMENT3_FILTER_SIZE_127   7

ENVIRONMENT3_FILTER_SIZE_15

#define ENVIRONMENT3_FILTER_SIZE_15   4

ENVIRONMENT3_FILTER_SIZE_3

#define ENVIRONMENT3_FILTER_SIZE_3   2

ENVIRONMENT3_FILTER_SIZE_31

#define ENVIRONMENT3_FILTER_SIZE_31   5

ENVIRONMENT3_FILTER_SIZE_63

#define ENVIRONMENT3_FILTER_SIZE_63   6

ENVIRONMENT3_FILTER_SIZE_7

#define ENVIRONMENT3_FILTER_SIZE_7   3

ENVIRONMENT3_GAS_INDEX_MASK

#define ENVIRONMENT3_GAS_INDEX_MASK   0x0F

ENVIRONMENT3_GAS_RANGE_MASK

#define ENVIRONMENT3_GAS_RANGE_MASK   0x0F

ENVIRONMENT3_GASM_VALID_MASK

#define ENVIRONMENT3_GASM_VALID_MASK   0x20

ENVIRONMENT3_HCTRL_MASK

#define ENVIRONMENT3_HCTRL_MASK   0x08

ENVIRONMENT3_HCTRL_POS

#define ENVIRONMENT3_HCTRL_POS   3

ENVIRONMENT3_HEAT_STAB_MASK

#define ENVIRONMENT3_HEAT_STAB_MASK   0x10

ENVIRONMENT3_HUM_REG_SHIFT_VAL_MASK

#define ENVIRONMENT3_HUM_REG_SHIFT_VAL_MASK   0x04

ENVIRONMENT3_IDX_GH1

#define ENVIRONMENT3_IDX_GH1   35

ENVIRONMENT3_IDX_GH2_LSB

#define ENVIRONMENT3_IDX_GH2_LSB   33

ENVIRONMENT3_IDX_GH2_MSB

#define ENVIRONMENT3_IDX_GH2_MSB   34

ENVIRONMENT3_IDX_GH3

#define ENVIRONMENT3_IDX_GH3   36

ENVIRONMENT3_IDX_H1_LSB

#define ENVIRONMENT3_IDX_H1_LSB   24

ENVIRONMENT3_IDX_H1_MSB

#define ENVIRONMENT3_IDX_H1_MSB   25

ENVIRONMENT3_IDX_H2_LSB

#define ENVIRONMENT3_IDX_H2_LSB   24

ENVIRONMENT3_IDX_H2_MSB

#define ENVIRONMENT3_IDX_H2_MSB   23

ENVIRONMENT3_IDX_H3

#define ENVIRONMENT3_IDX_H3   26

ENVIRONMENT3_IDX_H4

#define ENVIRONMENT3_IDX_H4   27

ENVIRONMENT3_IDX_H5

#define ENVIRONMENT3_IDX_H5   28

ENVIRONMENT3_IDX_H6

#define ENVIRONMENT3_IDX_H6   29

ENVIRONMENT3_IDX_H7

#define ENVIRONMENT3_IDX_H7   30

ENVIRONMENT3_IDX_P10

#define ENVIRONMENT3_IDX_P10   22

ENVIRONMENT3_IDX_P1_LSB

#define ENVIRONMENT3_IDX_P1_LSB   4

ENVIRONMENT3_IDX_P1_MSB

#define ENVIRONMENT3_IDX_P1_MSB   5

ENVIRONMENT3_IDX_P2_LSB

#define ENVIRONMENT3_IDX_P2_LSB   6

ENVIRONMENT3_IDX_P2_MSB

#define ENVIRONMENT3_IDX_P2_MSB   7

ENVIRONMENT3_IDX_P3

#define ENVIRONMENT3_IDX_P3   8

ENVIRONMENT3_IDX_P4_LSB

#define ENVIRONMENT3_IDX_P4_LSB   10

ENVIRONMENT3_IDX_P4_MSB

#define ENVIRONMENT3_IDX_P4_MSB   11

ENVIRONMENT3_IDX_P5_LSB

#define ENVIRONMENT3_IDX_P5_LSB   12

ENVIRONMENT3_IDX_P5_MSB

#define ENVIRONMENT3_IDX_P5_MSB   13

ENVIRONMENT3_IDX_P6

#define ENVIRONMENT3_IDX_P6   15

ENVIRONMENT3_IDX_P7

#define ENVIRONMENT3_IDX_P7   14

ENVIRONMENT3_IDX_P8_LSB

#define ENVIRONMENT3_IDX_P8_LSB   18

ENVIRONMENT3_IDX_P8_MSB

#define ENVIRONMENT3_IDX_P8_MSB   19

ENVIRONMENT3_IDX_P9_LSB

#define ENVIRONMENT3_IDX_P9_LSB   20

ENVIRONMENT3_IDX_P9_MSB

#define ENVIRONMENT3_IDX_P9_MSB   21

ENVIRONMENT3_IDX_RANGE_SW_ERR

#define ENVIRONMENT3_IDX_RANGE_SW_ERR   41

ENVIRONMENT3_IDX_RES_HEAT_RANGE

#define ENVIRONMENT3_IDX_RES_HEAT_RANGE   39

ENVIRONMENT3_IDX_RES_HEAT_VAL

#define ENVIRONMENT3_IDX_RES_HEAT_VAL   37

ENVIRONMENT3_IDX_T1_LSB

#define ENVIRONMENT3_IDX_T1_LSB   31

ENVIRONMENT3_IDX_T1_MSB

#define ENVIRONMENT3_IDX_T1_MSB   32

ENVIRONMENT3_IDX_T2_LSB

#define ENVIRONMENT3_IDX_T2_LSB   0

Environment 3 coefficient index macros.

Coefficient index setting.

ENVIRONMENT3_IDX_T2_MSB

#define ENVIRONMENT3_IDX_T2_MSB   1

ENVIRONMENT3_IDX_T3

#define ENVIRONMENT3_IDX_T3   2

ENVIRONMENT3_LEN_COEFF_1

#define ENVIRONMENT3_LEN_COEFF_1   23

ENVIRONMENT3_LEN_COEFF_2

#define ENVIRONMENT3_LEN_COEFF_2   14

ENVIRONMENT3_LEN_COEFF_3

#define ENVIRONMENT3_LEN_COEFF_3   5

ENVIRONMENT3_LEN_COEFF_ALL

#define ENVIRONMENT3_LEN_COEFF_ALL   42

Environment 3 buffer length macros.

Buffer length.

ENVIRONMENT3_LEN_CONFIG

#define ENVIRONMENT3_LEN_CONFIG   5

ENVIRONMENT3_LEN_FIELD

#define ENVIRONMENT3_LEN_FIELD   17

ENVIRONMENT3_LEN_INTERLEAVE_BUFF

#define ENVIRONMENT3_LEN_INTERLEAVE_BUFF   20

ENVIRONMENT3_MEM_PAGE_0

#define ENVIRONMENT3_MEM_PAGE_0   0x10

Environment 3 SPI page settings.

SPI memory page setting.

ENVIRONMENT3_MEM_PAGE_1

#define ENVIRONMENT3_MEM_PAGE_1   0x00

ENVIRONMENT3_MEM_PAGE_MASK

#define ENVIRONMENT3_MEM_PAGE_MASK   0x10

ENVIRONMENT3_MODE_FORCED

#define ENVIRONMENT3_MODE_FORCED   1

ENVIRONMENT3_MODE_MASK

#define ENVIRONMENT3_MODE_MASK   0x03

ENVIRONMENT3_MODE_SLEEP

#define ENVIRONMENT3_MODE_SLEEP   0

Environment 3 operating mode selection settings.

Operating mode selection setting.

ENVIRONMENT3_NBCONV_MASK

#define ENVIRONMENT3_NBCONV_MASK   0x0F

Environment 3 register mask summary.

The list of register masks.

ENVIRONMENT3_NEW_DATA_MASK

#define ENVIRONMENT3_NEW_DATA_MASK   0x80

ENVIRONMENT3_ODR20_MASK

#define ENVIRONMENT3_ODR20_MASK   0xE0

ENVIRONMENT3_ODR20_POS

#define ENVIRONMENT3_ODR20_POS   5

ENVIRONMENT3_ODR3_MASK

#define ENVIRONMENT3_ODR3_MASK   0x80

ENVIRONMENT3_ODR3_POS

#define ENVIRONMENT3_ODR3_POS   7

ENVIRONMENT3_ODR_0_59_MS

#define ENVIRONMENT3_ODR_0_59_MS   0

Environment 3 ODR/Standby time macros.

ODR/Standby time macros.

ENVIRONMENT3_ODR_1000_MS

#define ENVIRONMENT3_ODR_1000_MS   5

ENVIRONMENT3_ODR_10_MS

#define ENVIRONMENT3_ODR_10_MS   6

ENVIRONMENT3_ODR_125_MS

#define ENVIRONMENT3_ODR_125_MS   2

ENVIRONMENT3_ODR_20_MS

#define ENVIRONMENT3_ODR_20_MS   7

ENVIRONMENT3_ODR_250_MS

#define ENVIRONMENT3_ODR_250_MS   3

ENVIRONMENT3_ODR_500_MS

#define ENVIRONMENT3_ODR_500_MS   4

ENVIRONMENT3_ODR_62_5_MS

#define ENVIRONMENT3_ODR_62_5_MS   1

ENVIRONMENT3_ODR_NONE

#define ENVIRONMENT3_ODR_NONE   8

ENVIRONMENT3_OS_16X

#define ENVIRONMENT3_OS_16X   5

ENVIRONMENT3_OS_1X

#define ENVIRONMENT3_OS_1X   1

ENVIRONMENT3_OS_2X

#define ENVIRONMENT3_OS_2X   2

ENVIRONMENT3_OS_4X

#define ENVIRONMENT3_OS_4X   3

ENVIRONMENT3_OS_8X

#define ENVIRONMENT3_OS_8X   4

ENVIRONMENT3_OS_NONE

#define ENVIRONMENT3_OS_NONE   0

Environment 3 oversampling setting macros.

Oversampling setting macros.

ENVIRONMENT3_OSH_MASK

#define ENVIRONMENT3_OSH_MASK   0x07

ENVIRONMENT3_OSP_MASK

#define ENVIRONMENT3_OSP_MASK   0x1C

ENVIRONMENT3_OSP_POS

#define ENVIRONMENT3_OSP_POS   2

ENVIRONMENT3_OST_MASK

#define ENVIRONMENT3_OST_MASK   0xE0

ENVIRONMENT3_OST_POS

#define ENVIRONMENT3_OST_POS   5

ENVIRONMENT3_RHRANGE_MASK

#define ENVIRONMENT3_RHRANGE_MASK   0x30

ENVIRONMENT3_RSERROR_MASK

#define ENVIRONMENT3_RSERROR_MASK   0xF0

ENVIRONMENT3_RUN_GAS_MASK

#define ENVIRONMENT3_RUN_GAS_MASK   0x30

ENVIRONMENT3_RUN_GAS_POS

#define ENVIRONMENT3_RUN_GAS_POS   4

ENVIRONMENT3_SOFT_RESET

#define ENVIRONMENT3_SOFT_RESET   0xB6

Environment 3 reset settings.

Reset setting.

ENVIRONMENT3_SPI_READ_MASK

#define ENVIRONMENT3_SPI_READ_MASK   0x80

ENVIRONMENT3_SPI_WRITE_MASK

#define ENVIRONMENT3_SPI_WRITE_MASK   0x7F

ENVIRONMENT3_VARIANT_GAS_HIGH

#define ENVIRONMENT3_VARIANT_GAS_HIGH   0x01

ENVIRONMENT3_VARIANT_GAS_LOW

#define ENVIRONMENT3_VARIANT_GAS_LOW   0x00

Environment 3 variant ID macros.

Variant ID macros.

ENVIRONMENT3_W_DEFINE_OP_MODE

#define ENVIRONMENT3_W_DEFINE_OP_MODE   1

ENVIRONMENT3_W_NO_NEW_DATA

#define ENVIRONMENT3_W_NO_NEW_DATA   2