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#define | EXPAND2_IODIRA_BANK0 0x00 |
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#define | EXPAND2_IODIRB_BANK0 0x01 |
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#define | EXPAND2_IPOLA_BANK0 0x02 |
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#define | EXPAND2_IPOLB_BANK0 0x03 |
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#define | EXPAND2_GPINTENA_BANK0 0x04 |
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#define | EXPAND2_GPINTENB_BANK0 0x05 |
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#define | EXPAND2_DEFVALA_BANK0 0x06 |
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#define | EXPAND2_DEFVALB_BANK0 0x07 |
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#define | EXPAND2_INTCONA_BANK0 0x08 |
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#define | EXPAND2_INTCONB_BANK0 0x09 |
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#define | EXPAND2_IOCON_BANK0 0x0A |
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#define | EXPAND2_GPPUA_BANK0 0x0C |
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#define | EXPAND2_GPPUB_BANK0 0x0D |
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#define | EXPAND2_INTFA_BANK0 0x0E |
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#define | EXPAND2_INTFB_BANK0 0x0F |
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#define | EXPAND2_INTCAPA_BANK0 0x10 |
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#define | EXPAND2_INTCAPB_BANK0 0x11 |
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#define | EXPAND2_GPIOA_BANK0 0x12 |
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#define | EXPAND2_GPIOB_BANK0 0x13 |
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#define | EXPAND2_OLATA_BANK0 0x14 |
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#define | EXPAND2_OLATB_BANK0 0x15 |
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#define | EXPAND2_HD1_PA0 0x01 |
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#define | EXPAND2_HD1_PA1 0x02 |
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#define | EXPAND2_HD1_PA2 0x04 |
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#define | EXPAND2_HD1_PA3 0x08 |
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#define | EXPAND2_HD1_PA4 0x10 |
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#define | EXPAND2_HD1_PA5 0x20 |
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#define | EXPAND2_HD1_PA6 0x40 |
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#define | EXPAND2_HD1_PA7 0x80 |
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#define | EXPAND2_HD2_PB0 0x01 |
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#define | EXPAND2_HD2_PB1 0x02 |
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#define | EXPAND2_HD2_PB2 0x04 |
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#define | EXPAND2_HD2_PB3 0x08 |
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#define | EXPAND2_HD2_PB4 0x10 |
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#define | EXPAND2_HD2_PB5 0x20 |
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#define | EXPAND2_HD2_PB6 0x40 |
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#define | EXPAND2_HD2_PB7 0x80 |
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#define | EXPAND2_HD_START_POSITION 0x01 |
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#define | EXPAND2_INT_ERR 0xFF |
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