Functions
void	flash2_cfg_setup (flash2_cfg_t *cfg)
	Config Object Initialization function.

FLASH2_RETVAL	flash2_init (flash2_t ctx, flash2_cfg_t cfg)
	Initialization function.

void	flash2_generic_transfer (flash2_t ctx, uint8_t wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
	Generic transfer function.

uint8_t	flash2_busy (flash2_t *ctx)
	Flash 2 Busy.

uint8_t	flash2_get_status_reg (flash2_t *ctx)
	Flash 2 Get Status Register.

uint8_t	flash2_erase_status (flash2_t *ctx)
	Flash 2 Erase Status.

uint8_t	flash2_write_status (flash2_t *ctx)
	Flash 2 Write Status.

uint8_t	flash2_program_status (flash2_t *ctx)
	Flash 2 Program Status.

uint8_t	flash2_protect_status (flash2_t *ctx)
	Flash 2 Protect Status.

void	flash2_lock_security_id (flash2_t *ctx)
	flash2_lock_security_id

uint8_t	flash2_security_status (flash2_t *ctx)
	Flash 2 Security Status.

void	flash2_write_protect_enable (flash2_t *ctx)
	Flash 2 Write Protect Enable.

void	flash2_write_protect_disable (flash2_t *ctx)
	Flash 2 Write Protect Disable.

void	flash2_hold_enable (flash2_t *ctx)
	Flash 2 Hold Enable.

void	flash2_hold_disable (flash2_t *ctx)
	Flash 2 Hold Disable.

void	flash2_write_suspend (flash2_t *ctx)
	Flash 2 Write Suspend.

void	flash2_write_resume (flash2_t *ctx)
	Flash 2 Write Resume.

void	flash2_spi_get_security_id (flash2_t ctx, uint8_t buffer, uint32_t data_count)
	Flash 2 Get Security ID SPI.

void	flash2_sqi_get_security_id (flash2_t ctx, uint8_t buffer, uint32_t data_count)
	Flash 2 Get Security ID SQI.

void	flash2_set_security_id (flash2_t ctx, uint8_t buffer, uint32_t data_count)
	Flash 2 Set Security ID.

void	flash2_write_disable (flash2_t *ctx)
	Flash 2 Write Disable.

void	flash2_spi_get_bpr (flash2_t ctx, uint8_t buffer, uint32_t data_count)
	Flash 2 Get Block Protection Register SPI.

void	flash2_sqi_get_bpr (flash2_t ctx, uint8_t buffer, uint32_t data_count)
	Flash 2 Get Block Protection Register SQI.

void	flash2_set_bpr (flash2_t ctx, uint8_t buffer)
	Flash 2 Set Block Protection Register.

void	flash2_lockBpr (flash2_t *ctx)
	Flash 2 Lock Block Protection Register.

void	flash2_nonvolatile_write_lock (flash2_t ctx, uint8_t buffer)
	Flash 2 Non-Volatile Write-Lock.

void	flash2_global_block_unlock (flash2_t *ctx)
	Flash 2 Global Block Unlock.

void	flash2_read_generic (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Read.

void	flash2_highspeedRread (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 High Speed Read.

void	flash2_quadWrite (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Quad Write.

void	flash2_write_generic (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Write.

void	flash2_quad_enable (flash2_t *ctx)
	Flash 2 Quad Enable.

void	flash2_quad_out_read (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Quad Output Read.

void	flash2_quad_io_read (flash2_t ctx, uint32_t address, uint8_t mode, uint8_t buffer, uint32_t data_count)
	Flash 2 Quad I/O Read.

void	flash2_quad_reset (flash2_t *ctx)
	Flash 2 Quad Reset.

void	flash2_set_burst (flash2_t *ctx, uint8_t length)
	Flash 2 Set Burst.

void	flash2_read_sqi_burst_wrap (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Read Burst with Wrap through SQI.

void	flash2_read_spi_burst_wrap (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Read Burst with Wrap through SPI.

void	flash2_read_dual_output (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Read Dual Output.

void	flash2_read_dual_io (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 Read Dual I/O.

void	flash2_sector_erase (flash2_t *ctx, uint32_t address)
	Flash 2 Sector Erase.

void	flash2_block_erase (flash2_t *ctx, uint32_t address)
	Flash 2 Block Erase.

void	flash2_chip_erase (flash2_t *ctx)
	Flash 2 Chip Erase.

void	flash2_get_sfdp_params (flash2_t ctx, uint32_t address, uint8_t buffer, uint32_t data_count)
	Flash 2 get Serial Flash Discoverable \ Parameters.

uint8_t	flash2_quad_device_manufac (flash2_t *ctx)
	Flash 2 Quad Device Manufacturer.

uint8_t	flash2_quad_device_type (flash2_t *ctx)
	Flash 2 Quad Device Type.

uint8_t	flash2_quad_device_id (flash2_t *ctx)
	Flash 2 Quad Device ID.

uint8_t	flash2_device_manufac (flash2_t *ctx)
	Flash 2 Device Manufacturer.

uint8_t	flash2_device_type (flash2_t *ctx)
	Flash 2 Device Type.

uint8_t	flash2_device_id (flash2_t *ctx)
	Flash 2 Device ID.

void	flash2_reset (flash2_t *ctx)
	Flash 2 Reset.

void	flash2_write_status_reg (flash2_t *ctx, uint8_t s_reg)
	Flash 2 Write Status Register.

uint8_t	flash2_get_config_reg (flash2_t *ctx)
	Flash 2 Get Config Register.

void	flash2_write_enable (flash2_t *ctx)
	Flash 2 Write Enable.

Detailed Description

Function Documentation

◆ flash2_block_erase()

void flash2_block_erase	(	flash2_t *	ctx,
		uint32_t	address )

Flash 2 Block Erase.

Parameters

ctx	Click object.
address	- Address to start block erase from.

@description The Block-Erase instruction clears all bits in the selected block to ‘1’. Block sizes can be 8 KByte, 32 KByte or 64 KByte depending on address. A Block-Erase instruction applied to a protected memory area will be ignored.

◆ flash2_busy()

uint8_t flash2_busy ( flash2_t * ctx )

Flash 2 Busy.

Parameters

ctx	Click object.

Returns: 0 - Success, else - failure. @description Checks if click is busy reading/writing

Note: Used to check when click is ready to be written to / read from.

◆ flash2_cfg_setup()

void flash2_cfg_setup ( flash2_cfg_t * cfg )

Config Object Initialization function.

Parameters

cfg	Click configuration structure.

@description This function initializes click configuration structure to init state.

Note: All used pins will be set to unconnected state.

◆ flash2_chip_erase()

void flash2_chip_erase ( flash2_t * ctx )

Flash 2 Chip Erase.

Parameters

ctx	Click object.

@description The Chip-Erase instruction clears all bits in the device to ‘1.’ The Chip-Erase instruction is ignored if any of the memory area is protected.

◆ flash2_device_id()

uint8_t flash2_device_id ( flash2_t * ctx )

Flash 2 Device ID.

Parameters

ctx	Click object. @description Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.

Returns: - Device ID

◆ flash2_device_manufac()

uint8_t flash2_device_manufac ( flash2_t * ctx )

Flash 2 Device Manufacturer.

Parameters

ctx	Click object. @description Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.

Returns: - Device Manufacturer

◆ flash2_device_type()

uint8_t flash2_device_type ( flash2_t * ctx )

Flash 2 Device Type.

Parameters

ctx	Click object. @description Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.

Returns: - Device Type

◆ flash2_erase_status()

uint8_t flash2_erase_status ( flash2_t * ctx )

Flash 2 Erase Status.

Parameters

ctx	Click object.

Returns: 0-erase not suspended, 1-erase suspended. @description Checks if click erase is suspended

◆ flash2_generic_transfer()

void flash2_generic_transfer	(	flash2_t *	ctx,
		uint8_t *	wr_buf,
		uint16_t	wr_len,
		uint8_t *	rd_buf,
		uint16_t	rd_len )

Generic transfer function.

Parameters

ctx	Click object.
wr_buf	Write data buffer
wr_len	Number of byte in write data buffer
rd_buf	Read data buffer
rd_len	Number of byte in read data buffer

@description Generic SPI transfer, for sending and receiving packages

◆ flash2_get_config_reg()

uint8_t flash2_get_config_reg ( flash2_t * ctx )

Flash 2 Get Config Register.

Parameters

ctx	Click object. @description The Read-Configuration Register command outputs the contents of the Configuration register.

Returns: Contents of Configuration Register

◆ flash2_get_sfdp_params()

void flash2_get_sfdp_params	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 get Serial Flash Discoverable \ Parameters.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data into.
data_count	- Amount of bytes to read.

@description The Serial Flash Discoverable Parameters (SFDP) contain information describing the characteristics of the device. This allows device-independent, JEDEC ID- independent, and forward/backward compatible soft- ware support for all future Serial Flash device families.

◆ flash2_get_status_reg()

uint8_t flash2_get_status_reg ( flash2_t * ctx )

Flash 2 Get Status Register.

Parameters

ctx	Click object.

Returns: Status register.

@description The Read-Status Register command outputs the contents of the Status register.

◆ flash2_global_block_unlock()

void flash2_global_block_unlock ( flash2_t * ctx )

Flash 2 Global Block Unlock.

Parameters

ctx	Click object. @description The Global Block-Protection Unlock instruction clears all write-protection bits in the Block-Protection register, except for those bits that have been locked down with the nVWLDR command.

◆ flash2_highspeedRread()

void flash2_highspeedRread	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 High Speed Read.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description The High-Speed Read instruction, 0BH, is supported in both SPI bus protocol and SQI protocol. This instruction supports frequencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V.On power-up, the device is set to use SPI.

◆ flash2_hold_disable()

void flash2_hold_disable ( flash2_t * ctx )

Flash 2 Hold Disable.

Parameters

ctx	Click object. @description Enables Hold on Flash 2 Click

◆ flash2_hold_enable()

void flash2_hold_enable ( flash2_t * ctx )

Flash 2 Hold Enable.

Parameters

ctx	Click object. @description Enables Hold on Flash 2 Click

◆ flash2_init()

FLASH2_RETVAL flash2_init	(	flash2_t *	ctx,
		flash2_cfg_t *	cfg )

Initialization function.

Parameters

ctx	Click object.
cfg	Click configuration structure.

@description This function initializes all necessary pins and peripherals used for this click.

◆ flash2_lock_security_id()

void flash2_lock_security_id ( flash2_t * ctx )

flash2_lock_security_id

Parameters

ctx	Click object. @description The Lockout Security ID instruction prevents any future changes to the Security ID, and is supported in both SPI and SQI modes.

◆ flash2_lockBpr()

void flash2_lockBpr ( flash2_t * ctx )

Flash 2 Lock Block Protection Register.

Parameters

ctx	Click object. @description The Lock-Down Block-Protection Register instruction prevents changes to the Block-Protection register during device operation. Lock-Down resets after power cycling; this allows the Block-Protection register to be changed.

◆ flash2_nonvolatile_write_lock()

void flash2_nonvolatile_write_lock	(	flash2_t *	ctx,
		uint8_t *	buffer )

Flash 2 Non-Volatile Write-Lock.

Parameters

ctx	Click object. @description The Non-Volatile Write-Lock Lock-Down Register (nVWLDR) instruction controls the ability to change the Write-Lock bits in the Block-Protection register.
buffer	- Buffer with new values for BPR register.

◆ flash2_program_status()

uint8_t flash2_program_status ( flash2_t * ctx )

Flash 2 Program Status.

Parameters

ctx	Click object. @description Checks if click write-program is suspended

Returns: 0 - write program not suspended; 1 - write program suspended

◆ flash2_protect_status()

uint8_t flash2_protect_status ( flash2_t * ctx )

Flash 2 Protect Status.

Parameters

ctx	Click object. @description Checks if click write-protect lock-down is suspended

Returns: 0 - write-protect not suspended; 1 - write protect suspended

◆ flash2_quad_device_id()

uint8_t flash2_quad_device_id ( flash2_t * ctx )

Flash 2 Quad Device ID.

Parameters

ctx	Click object. @description The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.

Returns: - Device ID

◆ flash2_quad_device_manufac()

uint8_t flash2_quad_device_manufac ( flash2_t * ctx )

Flash 2 Quad Device Manufacturer.

Parameters

ctx	Click object. @description The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.

Returns: - Device Manufacturer

◆ flash2_quad_device_type()

uint8_t flash2_quad_device_type ( flash2_t * ctx )

Flash 2 Quad Device Type.

Parameters

ctx	Click object. @description The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.

Returns: - Device Type

◆ flash2_quad_enable()

void flash2_quad_enable ( flash2_t * ctx )

Flash 2 Quad Enable.

Parameters

ctx	Click object.

The Enable Quad I/O (EQIO) instruction, 38H, enables the flash device for SQI bus operation. Upon comple- tion of the instruction, all instructions thereafter are expected to be 4-bit multiplexed input/output (SQI mode) until a power cycle or a “Reset Quad I/O instruc- tion” is executed.

◆ flash2_quad_io_read()

void flash2_quad_io_read	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t	mode,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Quad I/O Read.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.
mode	- Mode to put Quad I/O in.

@description The SPI Quad I/O Read (SQIOR) instruction supports frequencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V. SST26VF064B requires the IOC bit in the configuration register to be set to ‘1’ prior to executing the command.

◆ flash2_quad_out_read()

void flash2_quad_out_read	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Quad Output Read.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description The SPI Quad-Output Read instruction supports fre- quencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V. SST26VF064B requires the IOC bit in the configuration register to be set to ‘1’ prior to exe- cuting the command.

◆ flash2_quad_reset()

void flash2_quad_reset ( flash2_t * ctx )

Flash 2 Quad Reset.

Parameters

ctx	Click object.

@description The Reset Quad I/O instruction, FFH, resets the device to 1-bit SPI protocol operation or exits the Set Mode configuration during a read sequence. This command allows the flash device to return to the default I/O state (SPI) without a power cycle, and executes in either 1- bit or 4-bit mode. If the device is in the Set Mode con- figuration, while in SQI High-Speed Read mode, the RSTQIO command will only return the device to a state where it can accept new command instruction. An addi- tional RSTQIO is required to reset the device to SPI mode.

◆ flash2_quadWrite()

void flash2_quadWrite	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Quad Write.

Parameters

ctx	Click object.
address	- Address to start write at.
buffer	- Buffer with data to write.
data_count	- Amount of bytes to write.

@description The SPI Quad Page-Program instruction programs up to 256 Bytes of data in the memory. The data for the selected page address must be in the erased state (FFH) before initiating the SPI Quad Page-Program operation. A SPI Quad Page-Program applied to a pro- tected memory area will be ignored. SST26VF064B requires the ICO bit in the configuration register to be set to ‘1’ prior to executing the command.

◆ flash2_read_dual_io()

void flash2_read_dual_io	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Read Dual I/O.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description Following the Set Mode configuration bits, the SST26VF064B/064BA outputs data from the specified address location. The device continually streams data output through all addresses until terminated by a low- to-high transition on CE#.

The Set Mode Configuration bit M[7:0] indicates if the next instruction cycle is another SPI Dual I/O Read command. When M[7:0] = AXH, the device expects the next continuous instruction to be another SDIOR com- mand, BBH, and does not require the op-code to be entered again. The host may set the next SDIOR cycle by driving CE# low, then sending the two-bit wide input for address A[23:0], followed by the Set Mode configu- ration bits M[7:0]. After the Set Mode configuration bits, the device outputs the data starting from the specified address location. There are no restrictions on address location access.

When M[7:0] is any value other than AXH, the device expects the next instruction initiated to be a command instruction. To reset/exit the Set Mode configuration, To reset/exit the Set Mode configuration, execute the Reset Quad I/O command.

Todo: Mode Selection must be implemented

◆ flash2_read_dual_output()

void flash2_read_dual_output	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Read Dual Output.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description The SPI Dual-Output Read instruction supports fre- quencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V.

◆ flash2_read_generic()

void flash2_read_generic	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Read.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read to.
data_count	- Amount of bytes to read.

@description The Read instruction, 03H, is supported in SPI bus pro- tocol only with clock frequencies up to 40 MHz. This command is not supported in SQI bus protocol. The device outputs the data starting from the specified address location, theand Configuration n continuously streams the data output through all addresses until terminated by a low- to-high transition on CE#. The internal address pointer will automatically increment until the highest memory address is reached. Once the highest memory address is reached, the address pointer will automatically return to the beginning (wrap-around) of the address space.

◆ flash2_read_spi_burst_wrap()

void flash2_read_spi_burst_wrap	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Read Burst with Wrap through SPI.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description During RBSPI, the internal address pointer automati- cally increments until the last byte of the burst is reached, then it wraps around to the first byte of the burst. For example, if the burst length is eight Bytes, and the start address is 06h, the burst sequence would be: 06h, 07h, 00h, 01h, 02h, 03h, 04h, 05h, 06h, etc. The pattern repeats until the command is terminated by a low-to-high transition on CE#. During this operation, blocks that are Read-locked will output data 00H.

8 Bytes 00-07H, 08-0FH, 10-17H, 18-1FH... 16 Bytes 00-0FH, 10-1FH, 20-2FH, 30-3FH... 32 Bytes 00-1FH, 20-3FH, 40-5FH, 60-7FH... 64 Bytes 00-3FH, 40-7FH, 80-BFH, C0-FFH

◆ flash2_read_sqi_burst_wrap()

void flash2_read_sqi_burst_wrap	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Read Burst with Wrap through SQI.

Parameters

ctx	Click object.
address	- Address to start reading from.
buffer	- Buffer to read data to.
data_count	- Amount of bytes to read.

@description During RBSQI, the internal address pointer automati- cally increments until the last byte of the burst is reached, then it wraps around to the first byte of the burst. For example, if the burst length is eight Bytes, and the start address is 06h, the burst sequence would be: 06h, 07h, 00h, 01h, 02h, 03h, 04h, 05h, 06h, etc. The pattern repeats until the command is terminated by a low-to-high transition on CE#. During this operation, blocks that are Read-locked will output data 00H.

8 Bytes 00-07H, 08-0FH, 10-17H, 18-1FH... 16 Bytes 00-0FH, 10-1FH, 20-2FH, 30-3FH... 32 Bytes 00-1FH, 20-3FH, 40-5FH, 60-7FH... 64 Bytes 00-3FH, 40-7FH, 80-BFH, C0-FFH

◆ flash2_reset()

void flash2_reset ( flash2_t * ctx )

Flash 2 Reset.

Parameters

ctx	Click object. @description The Reset operation is used as a system (software) reset that puts the device in normal operating Ready mode. This operation consists of two commands: Reset-Enable (RSTEN) followed by Reset (RST).

◆ flash2_sector_erase()

void flash2_sector_erase	(	flash2_t *	ctx,
		uint32_t	address )

Flash 2 Sector Erase.

Parameters

ctx	Click object.
address	- Address to start sector erase from.

@description The Sector-Erase instruction clears all bits in the selected 4 KByte sector to ‘1,’ but it does not change a protected memory area.

◆ flash2_security_status()

uint8_t flash2_security_status ( flash2_t * ctx )

Flash 2 Security Status.

Parameters

ctx	Click object. @description Checks if click security ID is locked

Returns: 0 - security ID not locked; 1 - security ID locked

◆ flash2_set_bpr()

void flash2_set_bpr	(	flash2_t *	ctx,
		uint8_t *	buffer )

Flash 2 Set Block Protection Register.

Parameters

ctx	Click object. @description The Write Block-Protection Register command changes the Block-Protection register data to indicate the protection status.
buffer	- Buffer with new BPR register values to write.

◆ flash2_set_burst()

void flash2_set_burst	(	flash2_t *	ctx,
		uint8_t	length )

Flash 2 Set Burst.

Parameters

ctx	Click object.
length

@description The Set Burst command specifies the number of bytes to be output during a Read Burst command before the device wraps around. It supports both SPI and SQI pro- tocols.

length = 0x00 = 8 bytes
length = 0x01 = 16 bytes
length = 0x02 = 32 bytes
length - 0x03 = 64 bytes

◆ flash2_set_security_id()

void flash2_set_security_id	(	flash2_t *	ctx,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Set Security ID.

Parameters

ctx	Click object. @description The Program Security ID instruction programs one to 2040 Bytes of data in the user-programmable, Security ID space. This Security ID space is one-time program- mable (OTP). The device ignores a Program Security ID instruction pointing to an invalid or protected address
buffer	- Buffer to write into.
data_count	- Amount of bytes to write.

◆ flash2_spi_get_bpr()

void flash2_spi_get_bpr	(	flash2_t *	ctx,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Get Block Protection Register SPI.

Parameters

ctx	Click object. @description The Read Block-Protection Register instruction outputs the Block-Protection register data which determines the protection status.
buffer	- Buffer to read data into.
data_count	- Amount of bytes to read.

◆ flash2_spi_get_security_id()

void flash2_spi_get_security_id	(	flash2_t *	ctx,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Get Security ID SPI.

Parameters

ctx	Click object. @description Reads the Unique ID Pre-Programmed at factory
buffer	- Buffer to read data into.
data_count	- Amount of bytes to read.

◆ flash2_sqi_get_bpr()

void flash2_sqi_get_bpr	(	flash2_t *	ctx,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Get Block Protection Register SQI.

Parameters

ctx	Click object. @description The Read Block-Protection Register instruction outputs the Block-Protection register data which determines the protection status.
buffer	- Buffer to read data into.
data_count	- Amount of bytes to read.

◆ flash2_sqi_get_security_id()

void flash2_sqi_get_security_id	(	flash2_t *	ctx,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Get Security ID SQI.

Parameters

ctx	Click object. @description Reads the Unique ID Pre-Programmed at factory
buffer	- Buffer to read data into.
data_count	- Amount of bytes to read.

◆ flash2_write_disable()

void flash2_write_disable ( flash2_t * ctx )

Flash 2 Write Disable.

Parameters

ctx	Click object. @description The Write Disable instruction sets the Write- Enable-Latch bit in the Status register to ‘0,’ not allowing Write operations to occur.

◆ flash2_write_enable()

void flash2_write_enable ( flash2_t * ctx )

Flash 2 Write Enable.

Parameters

ctx	Click object. @description The Write Enable (WREN) instruction sets the Write- Enable-Latch bit in the Status register to ‘1,’ allowing Write operations to occur.

◆ flash2_write_generic()

void flash2_write_generic	(	flash2_t *	ctx,
		uint32_t	address,
		uint8_t *	buffer,
		uint32_t	data_count )

Flash 2 Write.

Parameters

ctx	Click object.
address	- Address to start write at.
buffer	- Buffer with data to write.
data_count	- Amount of bytes to write.

@description The Page-Program instruction programs up to 256 Bytes of data in the memory, and supports both SPI and SQI protocols. The data for the selected page address must be in the erased state (FFH) before initi- ating the Page-Program operation. A Page-Program applied to a protected memory area will be ignored.

◆ flash2_write_protect_disable()

void flash2_write_protect_disable ( flash2_t * ctx )

Flash 2 Write Protect Disable.

Parameters

ctx	Click object. @description Disables Write Protect on Flash 2 Click

◆ flash2_write_protect_enable()

void flash2_write_protect_enable ( flash2_t * ctx )

Flash 2 Write Protect Enable.

Parameters

ctx	Click object. @description Enables Write Protect on Flash 2 Click

◆ flash2_write_resume()

void flash2_write_resume ( flash2_t * ctx )

Flash 2 Write Resume.

Parameters

ctx Click object. @description Write-Suspend allows the interruption of Sector-Erase, Block-Erase, SPI Quad Page-Program, or Page-Pro- gram operations in order to erase, program, or read data in another portion of memory. The original opera- tion can be continued with the Write-Resume com- mand. This operation is supported in both SQI and SPI protocols. Only one write operation can be suspended at a time; if an operation is already suspended, the device will ignore the Write-Suspend command. Write-Suspend during Chip-Erase is ignored; Chip-Erase is not a valid command while a write is suspended. The Write- Resume command is ignored until any write operation (Program or Erase) initiated during the Write-Suspend is complete. The device requires a minimum of 500 μs between each Write-Suspend command.

◆ flash2_write_status()

uint8_t flash2_write_status ( flash2_t * ctx )

Flash 2 Write Status.

Parameters

ctx	Click object. @description Checks if click write is suspended

Returns: 0 - write not suspended; 1 - write suspended

◆ flash2_write_status_reg()

void flash2_write_status_reg	(	flash2_t *	ctx,
		uint8_t	s_reg )

Flash 2 Write Status Register.

Parameters

ctx	Click object. @description The Write-Status Register (WRSR) command writes new values to the Configuration register.
s_reg	- New Conifuration Register Values

◆ flash2_write_suspend()

void flash2_write_suspend ( flash2_t * ctx )

Flash 2 Write Suspend.

Parameters

ctx Click object. @description Write-Suspend allows the interruption of Sector-Erase, Block-Erase, SPI Quad Page-Program, or Page-Pro- gram operations in order to erase, program, or read data in another portion of memory. The original opera- tion can be continued with the Write-Resume com- mand. This operation is supported in both SQI and SPI protocols. Only one write operation can be suspended at a time; if an operation is already suspended, the device will ignore the Write-Suspend command. Write-Suspend during Chip-Erase is ignored; Chip-Erase is not a valid command while a write is suspended. The Write- Resume command is ignored until any write operation (Program or Erase) initiated during the Write-Suspend is complete. The device requires a minimum of 500 μs between each Write-Suspend command.

Functions

Detailed Description

Function Documentation

◆ flash2_block_erase()

◆ flash2_busy()

◆ flash2_cfg_setup()

◆ flash2_chip_erase()

◆ flash2_device_id()

◆ flash2_device_manufac()

◆ flash2_device_type()

◆ flash2_erase_status()

◆ flash2_generic_transfer()

◆ flash2_get_config_reg()

◆ flash2_get_sfdp_params()

◆ flash2_get_status_reg()

◆ flash2_global_block_unlock()

◆ flash2_highspeedRread()

◆ flash2_hold_disable()

◆ flash2_hold_enable()

◆ flash2_init()

◆ flash2_lock_security_id()

◆ flash2_lockBpr()

◆ flash2_nonvolatile_write_lock()

◆ flash2_program_status()

◆ flash2_protect_status()

◆ flash2_quad_device_id()

◆ flash2_quad_device_manufac()

◆ flash2_quad_device_type()

◆ flash2_quad_enable()

◆ flash2_quad_io_read()

◆ flash2_quad_out_read()

◆ flash2_quad_reset()

◆ flash2_quadWrite()

◆ flash2_read_dual_io()

◆ flash2_read_dual_output()

◆ flash2_read_generic()

◆ flash2_read_spi_burst_wrap()

◆ flash2_read_sqi_burst_wrap()

◆ flash2_reset()

◆ flash2_sector_erase()

◆ flash2_security_status()

◆ flash2_set_bpr()

◆ flash2_set_burst()

◆ flash2_set_security_id()

◆ flash2_spi_get_bpr()

◆ flash2_spi_get_security_id()

◆ flash2_sqi_get_bpr()

◆ flash2_sqi_get_security_id()

◆ flash2_write_disable()

◆ flash2_write_enable()

◆ flash2_write_generic()

◆ flash2_write_protect_disable()

◆ flash2_write_protect_enable()

◆ flash2_write_resume()

◆ flash2_write_status()

◆ flash2_write_status_reg()

◆ flash2_write_suspend()