g2c3g.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
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** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
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** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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#ifndef G2C3G_H
#define G2C3G_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_uart.h"
 
#define G2C3G_CMD_AT                "AT"        // Communication test
#define G2C3G_CMD_GMR               "AT+GMR"    // Firmware version
#define G2C3G_CMD_ATE1              "ATE1"      // Enable echo
#define G2C3G_CMD_ATE0              "ATE0"      // Disable echo
#define G2C3G_CMD_GMSTA             "AT+GMSTA"  // LED status
#define G2C3G_CMD_RST               "AT+RST"    // Reset device
#define G2C3G_CMD_CRST              "AT+CRST"   // Connector module reset
#define G2C3G_CMD_CEN               "AT+CEN"    // Enable connector module
#define G2C3G_CMD_GPEN              "AT+GPEN"   // Enable GPIO outputs
#define G2C3G_CMD_W                 "AT+W"      // Store configuration
#define G2C3G_CMD_R                 "AT+R"      // Restore configuration
#define G2C3G_CMD_NWCR              "AT+NWCR"   // Network credentials
#define G2C3G_CMD_NWC               "AT+NWC"    // Connect to network
#define G2C3G_CMD_BRCR              "AT+BRCR"   // Broker credentials
#define G2C3G_CMD_BRC               "AT+BRC"    // Connect to broker
#define G2C3G_CMD_LRSP              "AT+LRSP"   // Long response
#define G2C3G_CMD_DSET              "AT+DSET"   // Data set
#define G2C3G_CMD_PUB               "AT+PUB"    // Publish data
 
#define G2C3G_RSP_OK                "OK"
#define G2C3G_RSP_ERROR             "ERROR"
#define G2C3G_RSP_DEVICE_READY      "DEVICE READY"
#define G2C3G_RSP_ERR               "+ERR"
#define G2C3G_RSP_ACT               "+ACT"
#define G2C3G_RSP_G2C3G             "+G2C3G"
#define G2C3G_RSP_G2C3G_RSP         "+G2C3G_RSP"
 
#define G2C3G_TX_DRV_BUFFER_SIZE    300
#define G2C3G_RX_DRV_BUFFER_SIZE    300
 
 // g2c3g_cmd
 
#define G2C3G_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.tx_pin  = MIKROBUS( mikrobus, MIKROBUS_TX ); \
    cfg.rx_pin  = MIKROBUS( mikrobus, MIKROBUS_RX ); \
    cfg.gp0 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.cts = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.gp1 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
    cfg.rts = MIKROBUS( mikrobus, MIKROBUS_INT );
 
 // g2c3g_map
 // g2c3g
 
typedef struct
{
    // Output pins
    digital_out_t rst;      
    digital_out_t cts;      
    // Input pins
    digital_in_t gp0;       
    digital_in_t gp1;       
    digital_in_t rts;       
    // Modules
    uart_t uart;            
    // Buffers
    uint8_t uart_rx_buffer[ G2C3G_RX_DRV_BUFFER_SIZE ]; 
    uint8_t uart_tx_buffer[ G2C3G_TX_DRV_BUFFER_SIZE ]; 
} g2c3g_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t rx_pin;      
    pin_name_t tx_pin;      
    // Additional gpio pins
    pin_name_t gp0;         
    pin_name_t rst;         
    pin_name_t cts;         
    pin_name_t gp1;         
    pin_name_t rts;         
    // Static variable
    uint32_t         baud_rate;         
    bool             uart_blocking;     
    uart_data_bits_t data_bit;          
    uart_parity_t    parity_bit;        
    uart_stop_bits_t stop_bit;          
} g2c3g_cfg_t;
 
typedef enum
{
    G2C3G_OK = 0,
    G2C3G_ERROR = -1,
    G2C3G_ERROR_TIMEOUT = -2,
    G2C3G_ERROR_CMD = -3,
    G2C3G_ERROR_UNKNOWN = -4
 
} g2c3g_return_value_t;
 
void g2c3g_cfg_setup ( g2c3g_cfg_t *cfg );
 
err_t g2c3g_init ( g2c3g_t *ctx, g2c3g_cfg_t *cfg );
 
err_t g2c3g_generic_write ( g2c3g_t *ctx, uint8_t *data_in, uint16_t len );
 
err_t g2c3g_generic_read ( g2c3g_t *ctx, uint8_t *data_out, uint16_t len );
 
void g2c3g_set_cts_pin ( g2c3g_t *ctx, uint8_t state );
 
void g2c3g_set_rst_pin ( g2c3g_t *ctx, uint8_t state );
 
uint8_t g2c3g_get_gp0_pin ( g2c3g_t *ctx );
 
uint8_t g2c3g_get_gp1_pin ( g2c3g_t *ctx );
 
uint8_t g2c3g_get_rts_pin ( g2c3g_t *ctx );
 
void g2c3g_reset_device ( g2c3g_t *ctx );
 
void g2c3g_send_cmd ( g2c3g_t *ctx, uint8_t *cmd );
 
void g2c3g_send_cmd_with_par ( g2c3g_t *ctx, uint8_t *at_cmd_buf, uint8_t *param_buf );
 
void g2c3g_send_cmd_check ( g2c3g_t *ctx, uint8_t *at_cmd_buf );
 
void g2c3g_send_cmd_par_check ( g2c3g_t *ctx, uint8_t *at_cmd_buf );
 
void g2c3g_set_net_creds ( g2c3g_t *ctx, uint8_t *sim_apn, uint8_t *username, uint8_t *password );
 
void g2c3g_set_broker_creds ( g2c3g_t *ctx, uint8_t *dev_key, uint8_t *password );
 
#ifdef __cplusplus
}
#endif
#endif // G2C3G_H
 
 // g2c3g
 
// ------------------------------------------------------------------------ END