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#define | HBRIDGEDRIVER2_DEF_FREQ 20000 |
| H-Bridge Driver 2default PWM frequency.
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#define | HBRIDGEDRIVER2_ID_VAL_ID_HDR 0x4300 |
| H-Bridge Driver 2 description ID data.
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#define | HBRIDGEDRIVER2_ID_VAL_VERSION 0x0100 |
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#define | HBRIDGEDRIVER2_ID_VAL_P_CODE_1 0x7500 |
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#define | HBRIDGEDRIVER2_ID_VAL_P_CODE_2 0x3500 |
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#define | HBRIDGEDRIVER2_ID_VAL_SPI_F_ID 0x0200 |
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#define | HBRIDGEDRIVER2_CTL_0_HS1 0x0200 |
| H-Bridge Driver 2 description control data.
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#define | HBRIDGEDRIVER2_CTL_0_LS1 0x0100 |
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#define | HBRIDGEDRIVER2_CTL_0_HS2 0x0080 |
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#define | HBRIDGEDRIVER2_CTL_0_LS2 0x0040 |
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#define | HBRIDGEDRIVER2_CTL_0_FWH 0x0010 |
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#define | HBRIDGEDRIVER2_CTL_0_FWA 0x0008 |
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#define | HBRIDGEDRIVER2_CTL_0_OVR 0x0004 |
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#define | HBRIDGEDRIVER2_CTL_0_UVR 0x0002 |
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#define | HBRIDGEDRIVER2_CTL_0_MODE 0x0001 |
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#define | HBRIDGEDRIVER2_STAT_0_OCHS1 0x0200 |
| H-Bridge Driver 2 description status data.
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#define | HBRIDGEDRIVER2_STAT_0_OCLS1 0x0100 |
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#define | HBRIDGEDRIVER2_STAT_0_OCHS2 0x0080 |
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#define | HBRIDGEDRIVER2_STAT_0_OCLS2 0x0040 |
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#define | HBRIDGEDRIVER2_STAT_0_VSUV 0x0008 |
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#define | HBRIDGEDRIVER2_STAT_0_VSOV 0x0004 |
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#define | HBRIDGEDRIVER2_STAT_0_OK 0x0000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_250_NS 0x0000 |
| H-Bridge Driver 2 description configuration data.
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_500_NS 0x1000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_750_NS 0x2000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_1_US 0x3000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_1_25_US 0x4000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_1_5_US 0x5000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_1_75_US 0x6000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_2_US 0x7000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_2_25_US 0x8000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_2_5_US 0x9000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_2_75_US 0xA000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_3_US 0xB000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_3_25_US 0xC000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_3_5_US 0xD000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_3_75_US 0xE000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRLH_4_US 0xF000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_250_NS 0x0000 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_500_NS 0x0100 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_750_NS 0x0200 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_1_US 0x0300 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_1_25_US 0x0400 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_1_5_US 0x0500 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_1_75_US 0x0600 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_2_US 0x0700 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_2_25_US 0x0800 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_2_5_US 0x0900 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_2_75_US 0x0A00 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_3_US 0x0B00 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_3_25_US 0x0C00 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_3_5_US 0x0D00 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_3_75_US 0x0E00 |
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#define | HBRIDGEDRIVER2_CFG_NOCRHL_4_US 0x0F00 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_0_25_V 0x0000 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_0_5_V 0x0020 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_0_75_V 0x0040 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_1_V 0x0060 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_1_25_V 0x0080 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_1_5_V 0x0090 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_1_75_V 0x00C0 |
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#define | HBRIDGEDRIVER2_CFG_OCTH_2_V 0x00E0 |
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#define | HBRIDGEDRIVER2_CFG_FULL_H_BRIDGE 0x0000 |
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#define | HBRIDGEDRIVER2_CFG_2_HALF_BRIDGES 0x0010 |
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#define | HBRIDGEDRIVER2_CFG_SLOW_SLEW_RATE 0x0000 |
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#define | HBRIDGEDRIVER2_CFG_FAST_SLEW_RATE 0x0008 |
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#define | HBRIDGEDRIVER2_CLEAR 0x00 |
| H-Bridge Driver 2 description Bit set/clear data.
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#define | HBRIDGEDRIVER2_SET 0x01 |
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#define | HBRIDGEDRIVER2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
| Data sample selection.
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#define | HBRIDGEDRIVER2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
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