42#ifdef PREINIT_SUPPORTED
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_i2c_master.h"
66#define HEARTRATE3_MAP_MIKROBUS( cfg, mikrobus ) \
67 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
68 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
69 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
70 cfg.clk = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
71 cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_INT )
78#define HEARTRATE3_OK 0
79#define HEARTRATE3_ERROR -1
86#define HEARTRATE3_SLAVE_ADDR 0x58
93#define HEARTRATE3_REG_CONTROL0 0x00
94#define HEARTRATE3_REG_LED2STC 0x01
95#define HEARTRATE3_REG_LED2ENDC 0x02
96#define HEARTRATE3_REG_LED1LEDSTC 0x03
97#define HEARTRATE3_REG_LED1LEDENDC 0x04
98#define HEARTRATE3_REG_ALED2STC 0x05
99#define HEARTRATE3_REG_ALED2ENDC 0x06
100#define HEARTRATE3_REG_LED1STC 0x07
101#define HEARTRATE3_REG_LED1ENDC 0x08
102#define HEARTRATE3_REG_LED2LEDSTC 0x09
103#define HEARTRATE3_REG_LED2LEDENDC 0x0A
104#define HEARTRATE3_REG_ALED1STC 0x0B
105#define HEARTRATE3_REG_ALED1ENDC 0x0C
106#define HEARTRATE3_REG_LED2CONVST 0x0D
107#define HEARTRATE3_REG_LED2CONVEND 0x0E
108#define HEARTRATE3_REG_ALED2CONVST 0x0F
109#define HEARTRATE3_REG_ALED2CONVEND 0x10
110#define HEARTRATE3_REG_LED1CONVST 0x11
111#define HEARTRATE3_REG_LED1CONVEND 0x12
112#define HEARTRATE3_REG_ALED1CONVST 0x13
113#define HEARTRATE3_REG_ALED1CONVEND 0x14
114#define HEARTRATE3_REG_ADCRSTSTCT0 0x15
115#define HEARTRATE3_REG_ADCRSTENDCT0 0x16
116#define HEARTRATE3_REG_ADCRSTSTCT1 0x17
117#define HEARTRATE3_REG_ADCRSTENDCT1 0x18
118#define HEARTRATE3_REG_ADCRSTSTCT2 0x19
119#define HEARTRATE3_REG_ADCRSTENDCT2 0x1A
120#define HEARTRATE3_REG_ADCRSTSTCT3 0x1B
121#define HEARTRATE3_REG_ADCRSTENDCT3 0x1C
122#define HEARTRATE3_REG_PRPCOUNT 0x1D
123#define HEARTRATE3_REG_CONTROL1 0x1E
124#define HEARTRATE3_REG_TIA_GAIN_SEP 0x20
125#define HEARTRATE3_REG_TIA_GAIN 0x21
126#define HEARTRATE3_REG_LEDCNTRL 0x22
127#define HEARTRATE3_REG_CONTROL2 0x23
128#define HEARTRATE3_REG_ALARM 0x29
129#define HEARTRATE3_REG_LED2VAL 0x2A
130#define HEARTRATE3_REG_ALED2VAL 0x2B
131#define HEARTRATE3_REG_LED1VAL 0x2C
132#define HEARTRATE3_REG_ALED1VAL 0x2D
133#define HEARTRATE3_REG_LED2_ALED2VAL 0x2E
134#define HEARTRATE3_REG_LED1_ALED1VAL 0x2F
135#define HEARTRATE3_REG_CONTROL3 0x31
136#define HEARTRATE3_REG_PDNCYCLESTC 0x32
137#define HEARTRATE3_REG_PDNCYCLEENDC 0x33
138#define HEARTRATE3_REG_PROG_TG_STC 0x34
139#define HEARTRATE3_REG_PROG_TG_ENDC 0x35
140#define HEARTRATE3_REG_LED3LEDSTC 0x36
141#define HEARTRATE3_REG_LED3LEDENDC 0x37
142#define HEARTRATE3_REG_CLKDIV_PRF 0x39
143#define HEARTRATE3_REG_OFFDAC 0x3A
144#define HEARTRATE3_REG_DEC 0x3D
145#define HEARTRATE3_REG_AVG_LED2_ALED2VAL 0x3F
146#define HEARTRATE3_REG_AVG_LED1_ALED1VAL 0x40
153#define HEARTRATE3_CONTROL0_CMD 0x000000ul
154#define HEARTRATE3_LED2STC_CMD 0x000050ul
155#define HEARTRATE3_LED2ENDC_CMD 0x00018Ful
156#define HEARTRATE3_LED1LEDSTC_CMD 0x000320ul
157#define HEARTRATE3_LED1LEDENDC_CMD 0x0004AFul
158#define HEARTRATE3_ALED2STC_CMD 0x0001E0ul
159#define HEARTRATE3_ALED2ENDC_CMD 0x00031Ful
160#define HEARTRATE3_LED1STC_CMD 0x000370ul
161#define HEARTRATE3_LED1ENDC_CMD 0x0004AFul
162#define HEARTRATE3_LED2LEDSTC_CMD 0x000000ul
163#define HEARTRATE3_LED2LEDENDC_CMD 0x00018Ful
164#define HEARTRATE3_ALED1STC_CMD 0x0004FFul
165#define HEARTRATE3_ALED1ENDC_CMD 0x00063Eul
166#define HEARTRATE3_LED2CONVST_CMD 0x000198ul
167#define HEARTRATE3_LED2CONVEND_CMD 0x0005BBul
168#define HEARTRATE3_ALED2CONVST_CMD 0x0005C4ul
169#define HEARTRATE3_ALED2CONVEND_CMD 0x0009E7ul
170#define HEARTRATE3_LED1CONVST_CMD 0x0009F0ul
171#define HEARTRATE3_LED1CONVEND_CMD 0x000E13ul
172#define HEARTRATE3_ALED1CONVST_CMD 0x000E1Cul
173#define HEARTRATE3_ALED1CONVEND_CMD 0x00123Ful
174#define HEARTRATE3_ADCRSTSTCT0_CMD 0x000191ul
175#define HEARTRATE3_ADCRSTENDCT0_CMD 0x000197ul
176#define HEARTRATE3_ADCRSTSTCT1_CMD 0x0005BDul
177#define HEARTRATE3_ADCRSTENDCT1_CMD 0x0005C3ul
178#define HEARTRATE3_ADCRSTSTCT2_CMD 0x0009E9ul
179#define HEARTRATE3_ADCRSTENDCT2_CMD 0x0009EFul
180#define HEARTRATE3_ADCRSTSTCT3_CMD 0x000E15ul
181#define HEARTRATE3_ADCRSTENDCT3_CMD 0x000E1Bul
182#define HEARTRATE3_PRPCOUNT_CMD 0x009C3Eul
183#define HEARTRATE3_CONTROL1_CMD 0x000103ul
184#define HEARTRATE3_TIA_GAIN_SEP_CMD 0x008003ul
185#define HEARTRATE3_TIA_GAIN_CMD 0x000003ul
186#define HEARTRATE3_LEDCNTRL_CMD 0x01B6D9ul
187#define HEARTRATE3_CONTROL2_CMD 0x104218ul
188#define HEARTRATE3_ALARM_CMD 0x000000ul
189#define HEARTRATE3_CONTROL3_CMD 0x000000ul
190#define HEARTRATE3_PDNCYCLESTC_CMD 0x00155Ful
191#define HEARTRATE3_PDNCYCLEENDC_CMD 0x00991Eul
192#define HEARTRATE3_PROG_TG_STC_CMD 0x000000ul
193#define HEARTRATE3_PROG_TG_ENDC_CMD 0x000000ul
194#define HEARTRATE3_LED3LEDSTC_CMD 0x000190ul
195#define HEARTRATE3_LED3LEDENDC_CMD 0x00031Ful
196#define HEARTRATE3_CLKDIV_PRF_CMD 0x000000ul
197#define HEARTRATE3_OFFDAC_CMD 0x000000ul
204#define HEARTRATE3_PIN_STATE_LOW 0x00
205#define HEARTRATE3_PIN_STATE_HIGH 0x01
void heartrate3_rst_state(heartrate3_t *ctx, uint8_t state)
Set Reset pin state.
err_t heartrate3_default_cfg(heartrate3_t *ctx)
Click Default Configuration function.
err_t heartrate3_write_data(heartrate3_t *ctx, uint8_t reg_adr, uint32_t wr_data)
Write data function.
void heartrate3_clk_state(heartrate3_t *ctx, uint8_t state)
Set Clock pin state.
err_t heartrate3_generic_write(heartrate3_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
Generic write function.
uint8_t heartrate3_check_data_ready(heartrate3_t *ctx)
Check data ready function.
err_t heartrate3_read_24bit(heartrate3_t *ctx, uint8_t reg_adr, uint32_t *data_out)
Read 24-bit data function.
void heartrate3_cfg_setup(heartrate3_cfg_t *cfg)
Config Object Initialization function.
err_t heartrate3_init(heartrate3_t *ctx, heartrate3_cfg_t *cfg)
Initialization function.
err_t heartrate3_read_16bit(heartrate3_t *ctx, uint8_t reg_adr, uint16_t *data_out)
Read 16-bit data function.
err_t heartrate3_generic_read(heartrate3_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
Generic read function.
Click configuration structure definition.
Definition heartrate3.h:239
pin_name_t clk
Definition heartrate3.h:246
uint32_t i2c_speed
Definition heartrate3.h:250
pin_name_t scl
Definition heartrate3.h:241
pin_name_t rdy
Definition heartrate3.h:247
pin_name_t sda
Definition heartrate3.h:242
pin_name_t rst
Definition heartrate3.h:245
uint8_t i2c_address
Definition heartrate3.h:251
Click ctx object definition.
Definition heartrate3.h:219
i2c_master_t i2c
Definition heartrate3.h:228
digital_out_t clk
Definition heartrate3.h:222
digital_out_t rst
Definition heartrate3.h:221
uint8_t slave_address
Definition heartrate3.h:231
digital_in_t rdy
Definition heartrate3.h:225