Settings for registers of ISO ADC 5 Click driver. More...

Macros
#define	ISOADC5_DEVICE_ID 0x00
	ISO ADC 5 PROD_ID register.

#define	ISOADC5_NORMAL_OPERATION 0x00

#define	ISOADC5_WAKE_UP_FROM_POR 0x80

#define	ISOADC5_DEVICE_REV 0x01

#define	ISOADC5_ADC_NOT_UPDATED 0x8000
	ISO ADC 5 ADC register.

#define	ISOADC5_ADC_12BIT_MASK 0x0FFF

#define	ISOADC5_CO_MODE_STATUS 0x80
	ISO ADC 5 COUTHI register.

#define	ISOADC5_CO_IN_SEL_FILTERED_ADC 0x40

#define	ISOADC5_STATUS_CO_4 0x08
	ISO ADC 5 COUT STATUS register.

#define	ISOADC5_STATUS_CO_3 0x04

#define	ISOADC5_STATUS_CO_2 0x02

#define	ISOADC5_STATUS_CO_1 0x01

#define	ISOADC5_INT_STATUS_EOC 0x1000
	ISO ADC 5 INTERRUPT STATUS register.

#define	ISOADC5_INT_STATUS_ADCF 0x0800

#define	ISOADC5_INT_STATUS_FLD 0x0400

#define	ISOADC5_INT_STATUS_SPIFRM 0x0200

#define	ISOADC5_INT_STATUS_SPICRC 0x0100

#define	ISOADC5_INT_STATUS_CO_POS_4 0x0080

#define	ISOADC5_INT_STATUS_CO_POS_3 0x0040

#define	ISOADC5_INT_STATUS_CO_POS_2 0x0020

#define	ISOADC5_INT_STATUS_CO_POS_1 0x0010

#define	ISOADC5_INT_STATUS_CO_NEG_4 0x0008

#define	ISOADC5_INT_STATUS_CO_NEG_3 0x0004

#define	ISOADC5_INT_STATUS_CO_NEG_2 0x0002

#define	ISOADC5_INT_STATUS_CO_NEG_1 0x0001

#define	ISOADC5_EN_CRC 0x8000
	ISO ADC 5 CONTROL register.

#define	ISOADC5_EN_COMMON_COMP 0x4000

#define	ISOADC5_CLEAR_FLT_4 0x0080

#define	ISOADC5_CLEAR_FLT_3 0x0040

#define	ISOADC5_CLEAR_FLT_2 0x0020

#define	ISOADC5_CLEAR_FLT_1 0x0010

#define	ISOADC5_DISABLE_PWR 0x0008

#define	ISOADC5_CLEAR_POR 0x0004

#define	ISOADC5_SOFT_RESET 0x0002

#define	ISOADC5_HARD_RESET 0x0001

#define	ISOADC5_ADC_CHANNEL_1 0x01
	ISO ADC 5 ADC channel number.

#define	ISOADC5_ADC_CHANNEL_2 0x02

#define	ISOADC5_ADC_CHANNEL_3 0x03

#define	ISOADC5_ADC_CHANNEL_4 0x04

#define	ISOADC5_ADC_UNFILTERED 0x00
	ISO ADC 5 ADC filtered flag.

#define	ISOADC5_ADC_FILTERED 0x01

#define	ISOADC5_MAX_VOLTAGE 48.0
	ISO ADC 5 Maximal voltage input.

#define	ISOADC5_SPI_READ 0x00
	ISO ADC 5 SPI mask.

#define	ISOADC5_SPI_WRITE 0x02

#define	ISOADC5_SPI_BURST 0x01

Detailed Description

Settings for registers of ISO ADC 5 Click driver.

Macro Definition Documentation

◆ ISOADC5_ADC_12BIT_MASK

#define ISOADC5_ADC_12BIT_MASK 0x0FFF

◆ ISOADC5_ADC_CHANNEL_1

#define ISOADC5_ADC_CHANNEL_1 0x01

ISO ADC 5 ADC channel number.

Specified ADC channel numbers of ISO ADC 5 Click driver.

◆ ISOADC5_ADC_CHANNEL_2

#define ISOADC5_ADC_CHANNEL_2 0x02

◆ ISOADC5_ADC_CHANNEL_3

#define ISOADC5_ADC_CHANNEL_3 0x03

◆ ISOADC5_ADC_CHANNEL_4

#define ISOADC5_ADC_CHANNEL_4 0x04

◆ ISOADC5_ADC_FILTERED

#define ISOADC5_ADC_FILTERED 0x01

◆ ISOADC5_ADC_NOT_UPDATED

#define ISOADC5_ADC_NOT_UPDATED 0x8000

ISO ADC 5 ADC register.

Specified bits of ADC registers of ISO ADC 5 Click driver.

◆ ISOADC5_ADC_UNFILTERED

#define ISOADC5_ADC_UNFILTERED 0x00

ISO ADC 5 ADC filtered flag.

Specified ADC filtered flags of ISO ADC 5 Click driver.

◆ ISOADC5_CLEAR_FLT_1

#define ISOADC5_CLEAR_FLT_1 0x0010

◆ ISOADC5_CLEAR_FLT_2

#define ISOADC5_CLEAR_FLT_2 0x0020

◆ ISOADC5_CLEAR_FLT_3

#define ISOADC5_CLEAR_FLT_3 0x0040

◆ ISOADC5_CLEAR_FLT_4

#define ISOADC5_CLEAR_FLT_4 0x0080

◆ ISOADC5_CLEAR_POR

#define ISOADC5_CLEAR_POR 0x0004

◆ ISOADC5_CO_IN_SEL_FILTERED_ADC

#define ISOADC5_CO_IN_SEL_FILTERED_ADC 0x40

◆ ISOADC5_CO_MODE_STATUS

#define ISOADC5_CO_MODE_STATUS 0x80

ISO ADC 5 COUTHI register.

Specified bits of COUTHI registers of ISO ADC 5 Click driver.

◆ ISOADC5_DEVICE_ID

#define ISOADC5_DEVICE_ID 0x00

ISO ADC 5 PROD_ID register.

Specified bits of PROD_ID register of ISO ADC 5 Click driver.

◆ ISOADC5_DEVICE_REV

#define ISOADC5_DEVICE_REV 0x01

◆ ISOADC5_DISABLE_PWR

#define ISOADC5_DISABLE_PWR 0x0008

◆ ISOADC5_EN_COMMON_COMP

#define ISOADC5_EN_COMMON_COMP 0x4000

◆ ISOADC5_EN_CRC

#define ISOADC5_EN_CRC 0x8000

ISO ADC 5 CONTROL register.

Specified bits of CONTROL register of ISO ADC 5 Click driver.

◆ ISOADC5_HARD_RESET

#define ISOADC5_HARD_RESET 0x0001

◆ ISOADC5_INT_STATUS_ADCF

#define ISOADC5_INT_STATUS_ADCF 0x0800

◆ ISOADC5_INT_STATUS_CO_NEG_1

#define ISOADC5_INT_STATUS_CO_NEG_1 0x0001

◆ ISOADC5_INT_STATUS_CO_NEG_2

#define ISOADC5_INT_STATUS_CO_NEG_2 0x0002

◆ ISOADC5_INT_STATUS_CO_NEG_3

#define ISOADC5_INT_STATUS_CO_NEG_3 0x0004

◆ ISOADC5_INT_STATUS_CO_NEG_4

#define ISOADC5_INT_STATUS_CO_NEG_4 0x0008

◆ ISOADC5_INT_STATUS_CO_POS_1

#define ISOADC5_INT_STATUS_CO_POS_1 0x0010

◆ ISOADC5_INT_STATUS_CO_POS_2

#define ISOADC5_INT_STATUS_CO_POS_2 0x0020

◆ ISOADC5_INT_STATUS_CO_POS_3

#define ISOADC5_INT_STATUS_CO_POS_3 0x0040

◆ ISOADC5_INT_STATUS_CO_POS_4

#define ISOADC5_INT_STATUS_CO_POS_4 0x0080

◆ ISOADC5_INT_STATUS_EOC

#define ISOADC5_INT_STATUS_EOC 0x1000

ISO ADC 5 INTERRUPT STATUS register.

Specified bits of INTERRUPT STATUS register of ISO ADC 5 Click driver.

◆ ISOADC5_INT_STATUS_FLD

#define ISOADC5_INT_STATUS_FLD 0x0400

◆ ISOADC5_INT_STATUS_SPICRC

#define ISOADC5_INT_STATUS_SPICRC 0x0100

◆ ISOADC5_INT_STATUS_SPIFRM

#define ISOADC5_INT_STATUS_SPIFRM 0x0200

◆ ISOADC5_MAX_VOLTAGE

#define ISOADC5_MAX_VOLTAGE 48.0

ISO ADC 5 Maximal voltage input.

Maximal voltage input value of ISO ADC 5 Click driver.

◆ ISOADC5_NORMAL_OPERATION

#define ISOADC5_NORMAL_OPERATION 0x00

◆ ISOADC5_SOFT_RESET

#define ISOADC5_SOFT_RESET 0x0002

◆ ISOADC5_SPI_BURST

#define ISOADC5_SPI_BURST 0x01

◆ ISOADC5_SPI_READ

#define ISOADC5_SPI_READ 0x00

ISO ADC 5 SPI mask.

Specified SPI mask bits of ISO ADC 5 Click driver.

◆ ISOADC5_SPI_WRITE

#define ISOADC5_SPI_WRITE 0x02

◆ ISOADC5_STATUS_CO_1

#define ISOADC5_STATUS_CO_1 0x01

◆ ISOADC5_STATUS_CO_2

#define ISOADC5_STATUS_CO_2 0x02

◆ ISOADC5_STATUS_CO_3

#define ISOADC5_STATUS_CO_3 0x04

◆ ISOADC5_STATUS_CO_4

#define ISOADC5_STATUS_CO_4 0x08

ISO ADC 5 COUT STATUS register.

Specified bits of COUT STATUS register of ISO ADC 5 Click driver.

◆ ISOADC5_WAKE_UP_FROM_POR

#define ISOADC5_WAKE_UP_FROM_POR 0x80

Macros