List of registers of MRAM 3 Click driver. More...

Macros
#define	MRAM3_CMD_NOP 0x00
	MRAM 3 control instruction set.

#define	MRAM3_CMD_WRITE_ENABLE 0x06

#define	MRAM3_CMD_WRITE_DISABLE 0x04

#define	MRAM3_CMD_ENABLE_DPI 0x37

#define	MRAM3_CMD_ENABLE_QPI 0x38

#define	MRAM3_CMD_ENABLE_SPI 0xFF

#define	MRAM3_CMD_ENTER_DEEP_POWER_DOWN 0xB9

#define	MRAM3_CMD_ENTER_HIBERNATE 0xBA

#define	MRAM3_CMD_SOFT_RESET_ENABLE 0x66

#define	MRAM3_CMD_SOFT_RESET 0x99

#define	MRAM3_CMD_EXIT_DEEP_POWER_DOWN 0xAB

#define	MRAM3_CMD_READ_STATUS 0x05
	MRAM 3 read register instruction set.

#define	MRAM3_CMD_READ_CONFIG_1 0x35

#define	MRAM3_CMD_READ_CONFIG_2 0x3F

#define	MRAM3_CMD_READ_CONFIG_3 0x44

#define	MRAM3_CMD_READ_CONFIG_4 0x45

#define	MRAM3_CMD_READ_CONFIG_ALL 0x46

#define	MRAM3_CMD_READ_DEVICE_ID 0x9F

#define	MRAM3_CMD_READ_UNIQUE_ID 0x4C

#define	MRAM3_CMD_READ_SERIAL_NUMBER 0xC3

#define	MRAM3_CMD_READ_AUG_ARRAY_PROTECT 0x14

#define	MRAM3_CMD_READ_ADDRESS_BASED 0x65

#define	MRAM3_CMD_WRITE_STATUS 0x01
	MRAM 3 write register instruction set.

#define	MRAM3_CMD_WRITE_CONFIG_ALL 0x87

#define	MRAM3_CMD_WRITE_SERIAL_NUMBER 0xC2

#define	MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT 0x1A

#define	MRAM3_CMD_WRITE_ADDRESS_BASED 0x71

#define	MRAM3_CMD_READ_MEMORY_SDR 0x03
	MRAM 3 read memory array instruction set.

#define	MRAM3_CMD_FAST_READ_MEMORY_SDR 0x0B

#define	MRAM3_CMD_FAST_READ_MEMORY_DDR 0x0D

#define	MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR 0x3B

#define	MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR 0x6B

#define	MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR 0xBB

#define	MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR 0xBD

#define	MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR 0xEB

#define	MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR 0xED

#define	MRAM3_CMD_WRITE_MEMORY_SDR 0x02
	MRAM 3 write memory array instruction set.

#define	MRAM3_CMD_FAST_WRITE_MEMORY_SDR 0xDA

#define	MRAM3_CMD_FAST_WRITE_MEMORY_DDR 0xDE

#define	MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR 0xA2

#define	MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR 0x32

#define	MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR 0x31

#define	MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR 0xA1

#define	MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR 0xD2

#define	MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR 0xD1

#define	MRAM3_CMD_READ_AUG_STORAGE_SDR 0x4B
	MRAM 3 augmented storage array instruction set.

#define	MRAM3_CMD_WRITE_AUG_STORAGE_SDR 0x42

Detailed Description

List of registers of MRAM 3 Click driver.

Macro Definition Documentation

◆ MRAM3_CMD_ENABLE_DPI

#define MRAM3_CMD_ENABLE_DPI 0x37

◆ MRAM3_CMD_ENABLE_QPI

#define MRAM3_CMD_ENABLE_QPI 0x38

◆ MRAM3_CMD_ENABLE_SPI

#define MRAM3_CMD_ENABLE_SPI 0xFF

◆ MRAM3_CMD_ENTER_DEEP_POWER_DOWN

#define MRAM3_CMD_ENTER_DEEP_POWER_DOWN 0xB9

◆ MRAM3_CMD_ENTER_HIBERNATE

#define MRAM3_CMD_ENTER_HIBERNATE 0xBA

◆ MRAM3_CMD_EXIT_DEEP_POWER_DOWN

#define MRAM3_CMD_EXIT_DEEP_POWER_DOWN 0xAB

◆ MRAM3_CMD_FAST_READ_MEMORY_DDR

#define MRAM3_CMD_FAST_READ_MEMORY_DDR 0x0D

◆ MRAM3_CMD_FAST_READ_MEMORY_SDR

#define MRAM3_CMD_FAST_READ_MEMORY_SDR 0x0B

◆ MRAM3_CMD_FAST_WRITE_MEMORY_DDR

#define MRAM3_CMD_FAST_WRITE_MEMORY_DDR 0xDE

◆ MRAM3_CMD_FAST_WRITE_MEMORY_SDR

#define MRAM3_CMD_FAST_WRITE_MEMORY_SDR 0xDA

◆ MRAM3_CMD_NOP

#define MRAM3_CMD_NOP 0x00

MRAM 3 control instruction set.

Specified control instruction set of MRAM 3 Click driver.

◆ MRAM3_CMD_READ_ADDRESS_BASED

#define MRAM3_CMD_READ_ADDRESS_BASED 0x65

◆ MRAM3_CMD_READ_AUG_ARRAY_PROTECT

#define MRAM3_CMD_READ_AUG_ARRAY_PROTECT 0x14

◆ MRAM3_CMD_READ_AUG_STORAGE_SDR

#define MRAM3_CMD_READ_AUG_STORAGE_SDR 0x4B

MRAM 3 augmented storage array instruction set.

Specified augmented storage array instruction set of MRAM 3 Click driver.

◆ MRAM3_CMD_READ_CONFIG_1

#define MRAM3_CMD_READ_CONFIG_1 0x35

◆ MRAM3_CMD_READ_CONFIG_2

#define MRAM3_CMD_READ_CONFIG_2 0x3F

◆ MRAM3_CMD_READ_CONFIG_3

#define MRAM3_CMD_READ_CONFIG_3 0x44

◆ MRAM3_CMD_READ_CONFIG_4

#define MRAM3_CMD_READ_CONFIG_4 0x45

◆ MRAM3_CMD_READ_CONFIG_ALL

#define MRAM3_CMD_READ_CONFIG_ALL 0x46

◆ MRAM3_CMD_READ_DEVICE_ID

#define MRAM3_CMD_READ_DEVICE_ID 0x9F

◆ MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR

#define MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR 0xBD

◆ MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR

#define MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR 0xBB

◆ MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR

#define MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR 0x3B

◆ MRAM3_CMD_READ_MEMORY_SDR

#define MRAM3_CMD_READ_MEMORY_SDR 0x03

MRAM 3 read memory array instruction set.

Specified read memory array instruction set of MRAM 3 Click driver.

◆ MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR

#define MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR 0xED

◆ MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR

#define MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR 0xEB

◆ MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR

#define MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR 0x6B

◆ MRAM3_CMD_READ_SERIAL_NUMBER

#define MRAM3_CMD_READ_SERIAL_NUMBER 0xC3

◆ MRAM3_CMD_READ_STATUS

#define MRAM3_CMD_READ_STATUS 0x05

MRAM 3 read register instruction set.

Specified read register instruction set of MRAM 3 Click driver.

◆ MRAM3_CMD_READ_UNIQUE_ID

#define MRAM3_CMD_READ_UNIQUE_ID 0x4C

◆ MRAM3_CMD_SOFT_RESET

#define MRAM3_CMD_SOFT_RESET 0x99

◆ MRAM3_CMD_SOFT_RESET_ENABLE

#define MRAM3_CMD_SOFT_RESET_ENABLE 0x66

◆ MRAM3_CMD_WRITE_ADDRESS_BASED

#define MRAM3_CMD_WRITE_ADDRESS_BASED 0x71

◆ MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT

#define MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT 0x1A

◆ MRAM3_CMD_WRITE_AUG_STORAGE_SDR

#define MRAM3_CMD_WRITE_AUG_STORAGE_SDR 0x42

◆ MRAM3_CMD_WRITE_CONFIG_ALL

#define MRAM3_CMD_WRITE_CONFIG_ALL 0x87

◆ MRAM3_CMD_WRITE_DISABLE

#define MRAM3_CMD_WRITE_DISABLE 0x04

◆ MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR

#define MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR 0xA2

◆ MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR

#define MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR 0xA1

◆ MRAM3_CMD_WRITE_ENABLE

#define MRAM3_CMD_WRITE_ENABLE 0x06

◆ MRAM3_CMD_WRITE_MEMORY_SDR

#define MRAM3_CMD_WRITE_MEMORY_SDR 0x02

MRAM 3 write memory array instruction set.

Specified write memory array instruction set of MRAM 3 Click driver.

◆ MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR

#define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR 0x31

◆ MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR

#define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR 0x32

◆ MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR

#define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR 0xD1

◆ MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR

#define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR 0xD2

◆ MRAM3_CMD_WRITE_SERIAL_NUMBER

#define MRAM3_CMD_WRITE_SERIAL_NUMBER 0xC2

◆ MRAM3_CMD_WRITE_STATUS

#define MRAM3_CMD_WRITE_STATUS 0x01

MRAM 3 write register instruction set.

Specified write register instruction set of MRAM 3 Click driver.

Macros