mux5.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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****************************************************************************/
 
#ifndef MUX5_H
#define MUX5_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define MUX5_REG_DIR0                   0x00
#define MUX5_REG_DIR1                   0x01
#define MUX5_REG_DIR2                   0x02
#define MUX5_REG_DIR3                   0x03
#define MUX5_REG_SHDW0                  0x10
#define MUX5_REG_SHDW1                  0x11
#define MUX5_REG_SHDW2                  0x12
#define MUX5_REG_SHDW3                  0x13
#define MUX5_REG_CMD_A                  0x14
#define MUX5_REG_CMD_B                  0x15
 
 // mux5_reg
 
#define MUX5_I2C_DRIVER                 0
#define MUX5_SPI_DRIVER                 1
#define MUX5_DRIVER_SEL                 MUX5_I2C_DRIVER
 
#define MUX5_CHANNEL_1                  0x0001
#define MUX5_CHANNEL_2                  0x0002
#define MUX5_CHANNEL_3                  0x0004
#define MUX5_CHANNEL_4                  0x0008
#define MUX5_CHANNEL_5                  0x0010
#define MUX5_CHANNEL_6                  0x0020
#define MUX5_CHANNEL_7                  0x0040
#define MUX5_CHANNEL_8                  0x0080
#define MUX5_CHANNEL_9                  0x0100
#define MUX5_CHANNEL_10                 0x0200
#define MUX5_CHANNEL_11                 0x0400
#define MUX5_CHANNEL_12                 0x0800
#define MUX5_CHANNEL_13                 0x1000
#define MUX5_CHANNEL_14                 0x2000
#define MUX5_CHANNEL_15                 0x4000
#define MUX5_CHANNEL_16                 0x8000
#define MUX5_CHANNEL_ALL                0xFFFF
 
#define MUX5_CHANNEL_STATE_HIGH_Z       0
#define MUX5_CHANNEL_STATE_COM_A        1
#define MUX5_CHANNEL_STATE_COM_B        2
#define MUX5_CHANNEL_STATE_COM_AB       3
 
#define MUX5_DEVICE_ADDRESS_0           0x4C
#define MUX5_DEVICE_ADDRESS_1           0x4D
 
#define MUX5_SET_DATA_SAMPLE_EDGE       SET_SPI_DATA_SAMPLE_EDGE
#define MUX5_SET_DATA_SAMPLE_MIDDLE     SET_SPI_DATA_SAMPLE_MIDDLE
 
 // mux5_set
 
#define MUX5_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl   = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda   = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
    cfg.miso  = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi  = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck   = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs    = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.com_b = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.sd    = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.com_a = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // mux5_map
 // mux5
 
typedef struct mux5_s
{
    digital_out_t sd;               
    digital_in_t com_b;             
    digital_in_t com_a;             
#if ( MUX5_DRIVER_SEL == MUX5_SPI_DRIVER )
    spi_master_t spi;               
    pin_name_t   chip_select;       
#else
    i2c_master_t i2c;               
    uint8_t      slave_address;     
#endif
    uint16_t     ch_a;              
    uint16_t     ch_b;              
} mux5_t;
 
typedef struct
{
    pin_name_t scl;                 
    pin_name_t sda;                 
    pin_name_t miso;                
    pin_name_t mosi;                
    pin_name_t sck;                 
    pin_name_t cs;                  
    pin_name_t com_b;               
    pin_name_t sd;                  
    pin_name_t com_a;               
    uint32_t   i2c_speed;           
    uint8_t    i2c_address;         
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
} mux5_cfg_t;
 
typedef enum
{
    MUX5_OK = 0,
    MUX5_ERROR = -1
 
} mux5_return_value_t;
 
void mux5_cfg_setup ( mux5_cfg_t *cfg );
 
err_t mux5_init ( mux5_t *ctx, mux5_cfg_t *cfg );
 
err_t mux5_default_cfg ( mux5_t *ctx );
 
#if ( MUX5_DRIVER_SEL == MUX5_I2C_DRIVER )
err_t mux5_i2c_write_register ( mux5_t *ctx, uint8_t reg, uint8_t data_in );
 
err_t mux5_i2c_read_register ( mux5_t *ctx, uint8_t reg, uint8_t *data_out );
#endif
 
err_t mux5_set_channels_state ( mux5_t *ctx, uint16_t ch_mask, uint8_t ch_state );
 
void mux5_enable_device ( mux5_t *ctx );
 
void mux5_disable_device ( mux5_t *ctx );
 
uint8_t mux5_get_com_a_pin ( mux5_t *ctx );
 
uint8_t mux5_get_com_b_pin ( mux5_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // MUX5_H
 
 // mux5
 
// ------------------------------------------------------------------------ END