Settings for registers of NanoBeacon Click driver. More...

Macros
#define	NANOBEACON_OPCODE_READY 0x01
	NanoBeacon opcode commands.

#define	NANOBEACON_OPCODE_READY_ACK 0x80

#define	NANOBEACON_OPCODE_READY_NACK 0x81

#define	NANOBEACON_OPCODE_RATE 0x02

#define	NANOBEACON_OPCODE_READ_REG 0x03

#define	NANOBEACON_OPCODE_READ_REG_RESP 0x83

#define	NANOBEACON_OPCODE_WRITE_REG 0x04

#define	NANOBEACON_OPCODE_WRITE_REG_RESP 0x84

#define	NANOBEACON_OPCODE_READ_MEM 0x05

#define	NANOBEACON_OPCODE_READ_MEM_RESP 0x85

#define	NANOBEACON_OPCODE_WRITE_MEM 0x06

#define	NANOBEACON_OPCODE_WRITE_MEM_RESP 0x86

#define	NANOBEACON_OPCODE_READ_EFUSE 0x07

#define	NANOBEACON_OPCODE_READ_EFUSE_RESP 0x87

#define	NANOBEACON_OPCODE_WRITE_EFUSE 0x08

#define	NANOBEACON_OPCODE_WRITE_EFUSE_RESP 0x88

#define	NANOBEACON_PACKET_HEADER 0xAE
	NanoBeacon command and data packet format.

#define	NANOBEACON_PACKET_TAIL 0xEA

#define	NANOBEACON_PAYLOAD_READY 0xAA

#define	NANOBEACON_PACKET_PAYLOAD_SIZE 128

#define	NANOBEACON_TIMEOUT_MS 3000

#define	NANOBEACON_CHECK_COMM_NUM_TRIES 5

#define	NANOBEACON_TX_DRV_BUFFER_SIZE ( NANOBEACON_PACKET_PAYLOAD_SIZE + 4 )
	NanoBeacon driver buffer size.

#define	NANOBEACON_RX_DRV_BUFFER_SIZE ( NANOBEACON_PACKET_PAYLOAD_SIZE + 4 )

Detailed Description

Settings for registers of NanoBeacon Click driver.

Macro Definition Documentation

◆ NANOBEACON_CHECK_COMM_NUM_TRIES

#define NANOBEACON_CHECK_COMM_NUM_TRIES 5

◆ NANOBEACON_OPCODE_RATE

#define NANOBEACON_OPCODE_RATE 0x02

◆ NANOBEACON_OPCODE_READ_EFUSE

#define NANOBEACON_OPCODE_READ_EFUSE 0x07

◆ NANOBEACON_OPCODE_READ_EFUSE_RESP

#define NANOBEACON_OPCODE_READ_EFUSE_RESP 0x87

◆ NANOBEACON_OPCODE_READ_MEM

#define NANOBEACON_OPCODE_READ_MEM 0x05

◆ NANOBEACON_OPCODE_READ_MEM_RESP

#define NANOBEACON_OPCODE_READ_MEM_RESP 0x85

◆ NANOBEACON_OPCODE_READ_REG

#define NANOBEACON_OPCODE_READ_REG 0x03

◆ NANOBEACON_OPCODE_READ_REG_RESP

#define NANOBEACON_OPCODE_READ_REG_RESP 0x83

◆ NANOBEACON_OPCODE_READY

#define NANOBEACON_OPCODE_READY 0x01

NanoBeacon opcode commands.

Specified setting for opcode commands of NanoBeacon Click driver.

◆ NANOBEACON_OPCODE_READY_ACK

#define NANOBEACON_OPCODE_READY_ACK 0x80

◆ NANOBEACON_OPCODE_READY_NACK

#define NANOBEACON_OPCODE_READY_NACK 0x81

◆ NANOBEACON_OPCODE_WRITE_EFUSE

#define NANOBEACON_OPCODE_WRITE_EFUSE 0x08

◆ NANOBEACON_OPCODE_WRITE_EFUSE_RESP

#define NANOBEACON_OPCODE_WRITE_EFUSE_RESP 0x88

◆ NANOBEACON_OPCODE_WRITE_MEM

#define NANOBEACON_OPCODE_WRITE_MEM 0x06

◆ NANOBEACON_OPCODE_WRITE_MEM_RESP

#define NANOBEACON_OPCODE_WRITE_MEM_RESP 0x86

◆ NANOBEACON_OPCODE_WRITE_REG

#define NANOBEACON_OPCODE_WRITE_REG 0x04

◆ NANOBEACON_OPCODE_WRITE_REG_RESP

#define NANOBEACON_OPCODE_WRITE_REG_RESP 0x84

◆ NANOBEACON_PACKET_HEADER

#define NANOBEACON_PACKET_HEADER 0xAE

NanoBeacon command and data packet format.

Specified setting for command and data packet format of NanoBeacon Click driver.

◆ NANOBEACON_PACKET_PAYLOAD_SIZE

#define NANOBEACON_PACKET_PAYLOAD_SIZE 128

◆ NANOBEACON_PACKET_TAIL

#define NANOBEACON_PACKET_TAIL 0xEA

◆ NANOBEACON_PAYLOAD_READY

#define NANOBEACON_PAYLOAD_READY 0xAA

◆ NANOBEACON_RX_DRV_BUFFER_SIZE

#define NANOBEACON_RX_DRV_BUFFER_SIZE ( NANOBEACON_PACKET_PAYLOAD_SIZE + 4 )

◆ NANOBEACON_TIMEOUT_MS

#define NANOBEACON_TIMEOUT_MS 3000

◆ NANOBEACON_TX_DRV_BUFFER_SIZE

#define NANOBEACON_TX_DRV_BUFFER_SIZE ( NANOBEACON_PACKET_PAYLOAD_SIZE + 4 )

NanoBeacon driver buffer size.

Specified size of driver ring buffer.

Note: Increase buffer size if needed.

Macros