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#define | NTAG5LINK_CONFIG_SIGNATURE 0x1000 |
| NTAG 5 Link configuration memory organization.
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#define | NTAG5LINK_CONFIG_HEADER 0x1008 |
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#define | NTAG5LINK_CONFIG_ID 0x1009 |
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#define | NTAG5LINK_CONFIG_NFC_GCH 0x100C |
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#define | NTAG5LINK_CONFIG_NFC_CCH 0x100D |
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#define | NTAG5LINK_CONFIG_NFC_AUTH_LIMIT 0x100E |
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#define | NTAG5LINK_CONFIG_NFC_KH0 0x1010 |
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#define | NTAG5LINK_CONFIG_NFC_KP0 0x1011 |
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#define | NTAG5LINK_CONFIG_NFC_KH1 0x1012 |
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#define | NTAG5LINK_CONFIG_NFC_KP1 0x1013 |
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#define | NTAG5LINK_CONFIG_NFC_KH2 0x1014 |
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#define | NTAG5LINK_CONFIG_NFC_KP2 0x1015 |
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#define | NTAG5LINK_CONFIG_NFC_KH3 0x1016 |
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#define | NTAG5LINK_CONFIG_NFC_KP3 0x1017 |
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#define | NTAG5LINK_CONFIG_KEY_0 0x1020 |
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#define | NTAG5LINK_CONFIG_KEY_1 0x1024 |
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#define | NTAG5LINK_CONFIG_KEY_2 0x1028 |
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#define | NTAG5LINK_CONFIG_KEY_3 0x102C |
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#define | NTAG5LINK_CONFIG_I2C_KH 0x1030 |
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#define | NTAG5LINK_CONFIG_I2C_PP_AND_PPC 0x1031 |
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#define | NTAG5LINK_CONFIG_I2C_AUTH_LIMIT 0x1032 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_0 0x1033 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_1 0x1034 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_2 0x1035 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_3 0x1036 |
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#define | NTAG5LINK_CONFIG_CONFIG 0x1037 |
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#define | NTAG5LINK_CONFIG_SYNC_DATA_BLOCK 0x1038 |
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#define | NTAG5LINK_CONFIG_PWM_GPIO_CONFIG 0x1039 |
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#define | NTAG5LINK_CONFIG_PWM0_ON_OFF 0x103A |
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#define | NTAG5LINK_CONFIG_PWM1_ON_OFF 0x103B |
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#define | NTAG5LINK_CONFIG_WDT_CFG_AND_SRAM_COPY 0x103C |
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#define | NTAG5LINK_CONFIG_EH_AND_ED_CONFIG 0x103D |
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#define | NTAG5LINK_CONFIG_I2C_SLAVE_MASTER_CFG 0x103E |
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#define | NTAG5LINK_CONFIG_SEC_SRAM_AND_PP_AREA_1 0x103F |
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#define | NTAG5LINK_CONFIG_SRAM_DEFAULT 0x1045 |
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#define | NTAG5LINK_CONFIG_AFI 0x1055 |
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#define | NTAG5LINK_CONFIG_DSFID 0x1056 |
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#define | NTAG5LINK_CONFIG_EAS_ID 0x1057 |
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#define | NTAG5LINK_CONFIG_NFC_PP_AREA_0_AND_PPC 0x1058 |
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#define | NTAG5LINK_CONFIG_NFC_LOCK_BLOCK 0x106A |
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#define | NTAG5LINK_CONFIG_I2C_LOCK_BLOCK 0x108A |
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#define | NTAG5LINK_CONFIG_NFC_SECTION_LOCK 0x1092 |
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#define | NTAG5LINK_CONFIG_I2C_SECTION_LOCK 0x1094 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_0_AUTH 0x1096 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_1_AUTH 0x1097 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_2_AUTH 0x1098 |
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#define | NTAG5LINK_CONFIG_I2C_PWD_3_AUTH 0x1099 |
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#define | NTAG5LINK_SESSION_REG_STATUS 0x10A0 |
| NTAG 5 Link session register list.
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#define | NTAG5LINK_SESSION_REG_CONFIG 0x10A1 |
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#define | NTAG5LINK_SESSION_REG_SYNC_DATA_BLOCK 0x10A2 |
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#define | NTAG5LINK_SESSION_REG_PWM_GPIO_CONFIG 0x10A3 |
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#define | NTAG5LINK_SESSION_REG_PWM0_ON_OFF 0x10A4 |
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#define | NTAG5LINK_SESSION_REG_PWM1_ON_OFF 0x10A5 |
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#define | NTAG5LINK_SESSION_REG_WDT_CONFIG 0x10A6 |
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#define | NTAG5LINK_SESSION_REG_EH_CONFIG 0x10A7 |
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#define | NTAG5LINK_SESSION_REG_ED_CONFIG 0x10A8 |
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#define | NTAG5LINK_SESSION_REG_I2C_SLAVE_CONFIG 0x10A9 |
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#define | NTAG5LINK_SESSION_REG_RESET_GEN 0x10AA |
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#define | NTAG5LINK_SESSION_REG_ED_INTR_CLEAR 0x10AB |
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#define | NTAG5LINK_SESSION_REG_I2C_MASTER_CONFIG 0x10AC |
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#define | NTAG5LINK_SESSION_REG_I2C_MASTER_STATUS 0x10AD |
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#define | NTAG5LINK_SESSION_REG_BYTE_0 0x00 |
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#define | NTAG5LINK_SESSION_REG_BYTE_1 0x01 |
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#define | NTAG5LINK_SESSION_REG_BYTE_2 0x02 |
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#define | NTAG5LINK_SESSION_REG_BYTE_3 0x03 |
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#define | NTAG5LINK_USER_MEMORY_ADDRESS_MIN 0x0000 |
| NTAG 5 Link memory organization.
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#define | NTAG5LINK_USER_MEMORY_ADDRESS_MAX 0x01FF |
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#define | NTAG5LINK_CONFIG_MEMORY_ADDRESS_MIN 0x1000 |
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#define | NTAG5LINK_CONFIG_MEMORY_ADDRESS_MAX 0x109F |
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#define | NTAG5LINK_SESSION_REG_ADDRESS_MIN 0x10A0 |
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#define | NTAG5LINK_SESSION_REG_ADDRESS_MAX 0x10AF |
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#define | NTAG5LINK_MEMORY_BLOCK_SIZE 4 |
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#define | NTAG5LINK_CONFIG_0_SRAM_COPY_ENABLE 0x80 |
| NTAG 5 Link CONFIG registers setting.
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#define | NTAG5LINK_CONFIG_0_EH_LOW_FIELD_STR 0x08 |
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#define | NTAG5LINK_CONFIG_0_EH_HIGH_FIELD_STR 0x0C |
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#define | NTAG5LINK_CONFIG_0_LOCK_SESSION_REG 0x02 |
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#define | NTAG5LINK_CONFIG_0_AUTO_STANDBY_MODE_EN 0x01 |
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#define | NTAG5LINK_CONFIG_1_EH_ARBITER_MODE_EN 0x80 |
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#define | NTAG5LINK_CONFIG_1_USE_CASE_I2C_SLAVE 0x00 |
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#define | NTAG5LINK_CONFIG_1_USE_CASE_I2C_MASTER 0x10 |
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#define | NTAG5LINK_CONFIG_1_USE_CASE_GPIO_PWM 0x20 |
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#define | NTAG5LINK_CONFIG_1_USE_CASE_3_STATE 0x30 |
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#define | NTAG5LINK_CONFIG_1_ARBITER_NORMAL_MODE 0x00 |
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#define | NTAG5LINK_CONFIG_1_ARBITER_SRAM_MIRROR 0x04 |
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#define | NTAG5LINK_CONFIG_1_ARBITER_SRAM_PT 0x08 |
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#define | NTAG5LINK_CONFIG_1_ARBITER_SRAM_PHDC 0x0C |
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#define | NTAG5LINK_CONFIG_1_SRAM_ENABLE 0x02 |
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#define | NTAG5LINK_CONFIG_1_PT_TRANSFER_I2C_NFC 0x00 |
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#define | NTAG5LINK_CONFIG_1_PT_TRANSFER_NFC_I2C 0x01 |
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#define | NTAG5LINK_CONFIG_2_GPIO1_IN_DISABLE 0x00 |
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#define | NTAG5LINK_CONFIG_2_GPIO1_IN_PULL_UP 0x40 |
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#define | NTAG5LINK_CONFIG_2_GPIO1_IN_ENABLE 0x80 |
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#define | NTAG5LINK_CONFIG_2_GPIO1_IN_PULL_DOWN 0xC0 |
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#define | NTAG5LINK_CONFIG_2_GPIO0_IN_DISABLE 0x00 |
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#define | NTAG5LINK_CONFIG_2_GPIO0_IN_PULL_UP 0x10 |
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#define | NTAG5LINK_CONFIG_2_GPIO0_IN_ENABLE 0x20 |
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#define | NTAG5LINK_CONFIG_2_GPIO0_IN_PULL_DOWN 0x30 |
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#define | NTAG5LINK_CONFIG_2_EXT_CMD_SUPPORT 0x08 |
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#define | NTAG5LINK_CONFIG_2_LOCK_BLK_CMD_SUPPORT 0x04 |
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#define | NTAG5LINK_CONFIG_2_GPIO1_HIGH_SLEW_RATE 0x02 |
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#define | NTAG5LINK_CONFIG_2_GPIO0_HIGH_SLEW_RATE 0x01 |
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#define | NTAG5LINK_CAPABILITY_CONTAINER_ADDRESS 0x0000 |
| NTAG 5 Link NDEF message setting.
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#define | NTAG5LINK_CAPABILITY_CONTAINER 0xE1, 0x40, 0x80, 0x01 |
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#define | NTAG5LINK_NDEF_MESSAGE_START_ADDRESS 0x0001 |
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#define | NTAG5LINK_TYPE_NDEF_MESSAGE 0x03 |
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#define | NTAG5LINK_NDEF_RECORD_HEADER 0xD1 |
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#define | NTAG5LINK_NDEF_TYPE_LENGTH 0x01 |
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#define | NTAG5LINK_NDEF_URI_TYPE 'U' |
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#define | NTAG5LINK_NDEF_MESSAGE_END_MARK 0xFE |
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#define | NTAG5LINK_URI_PREFIX_0 0x00 |
| NTAG 5 Link NDEF URI prefix list.
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#define | NTAG5LINK_URI_PREFIX_1 0x01 |
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#define | NTAG5LINK_URI_PREFIX_2 0x02 |
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#define | NTAG5LINK_URI_PREFIX_3 0x03 |
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#define | NTAG5LINK_URI_PREFIX_4 0x04 |
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#define | NTAG5LINK_URI_PREFIX_5 0x05 |
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#define | NTAG5LINK_URI_PREFIX_6 0x06 |
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#define | NTAG5LINK_URI_PREFIX_7 0x07 |
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#define | NTAG5LINK_URI_PREFIX_8 0x08 |
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#define | NTAG5LINK_URI_PREFIX_9 0x09 |
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#define | NTAG5LINK_URI_PREFIX_10 0x0A |
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#define | NTAG5LINK_URI_PREFIX_11 0x0B |
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#define | NTAG5LINK_URI_PREFIX_12 0x0C |
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#define | NTAG5LINK_URI_PREFIX_13 0x0D |
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#define | NTAG5LINK_URI_PREFIX_14 0x0E |
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#define | NTAG5LINK_URI_PREFIX_15 0x0F |
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#define | NTAG5LINK_URI_PREFIX_16 0x10 |
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#define | NTAG5LINK_URI_PREFIX_17 0x11 |
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#define | NTAG5LINK_URI_PREFIX_18 0x12 |
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#define | NTAG5LINK_URI_PREFIX_19 0x13 |
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#define | NTAG5LINK_URI_PREFIX_20 0x14 |
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#define | NTAG5LINK_URI_PREFIX_21 0x15 |
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#define | NTAG5LINK_URI_PREFIX_22 0x16 |
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#define | NTAG5LINK_URI_PREFIX_23 0x17 |
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#define | NTAG5LINK_URI_PREFIX_24 0x18 |
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#define | NTAG5LINK_URI_PREFIX_25 0x19 |
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#define | NTAG5LINK_URI_PREFIX_26 0x1A |
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#define | NTAG5LINK_URI_PREFIX_27 0x1B |
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#define | NTAG5LINK_URI_PREFIX_28 0x1C |
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#define | NTAG5LINK_URI_PREFIX_29 0x1D |
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#define | NTAG5LINK_URI_PREFIX_30 0x1E |
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#define | NTAG5LINK_URI_PREFIX_31 0x1F |
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#define | NTAG5LINK_URI_PREFIX_32 0x20 |
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#define | NTAG5LINK_URI_PREFIX_33 0x21 |
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#define | NTAG5LINK_URI_PREFIX_34 0x22 |
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#define | NTAG5LINK_URI_PREFIX_35 0x23 |
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#define | NTAG5LINK_DEVICE_ADDRESS 0x54 |
| NTAG 5 Link device address setting.
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#define | NTAG5LINK_MAP_MIKROBUS(cfg, mikrobus) |
| MikroBUS pin mapping.
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