mikroSDK Reference Manual
osal_none.h
1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2019 Ha Thach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef _TUSB_OSAL_NONE_H_
28#define _TUSB_OSAL_NONE_H_
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34//--------------------------------------------------------------------+
35// TASK API
36//--------------------------------------------------------------------+
37
38#if CFG_TUH_ENABLED
39// currently only needed/available in host mode
40TU_ATTR_WEAK void osal_task_delay(uint32_t msec);
41#endif
42
43//--------------------------------------------------------------------+
44// Binary Semaphore API
45//--------------------------------------------------------------------+
46typedef struct
47{
48 volatile uint16_t count;
50
51typedef osal_semaphore_def_t* osal_semaphore_t;
52
53TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
54{
55 semdef->count = 0;
56 return semdef;
57}
58
59TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
60{
61 (void) in_isr;
62 sem_hdl->count++;
63 return true;
64}
65
66// TODO blocking for now
67TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec)
68{
69 (void) msec;
70
71 while (sem_hdl->count == 0) { }
72 sem_hdl->count--;
73
74 return true;
75}
76
77TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
78{
79 sem_hdl->count = 0;
80}
81
82//--------------------------------------------------------------------+
83// MUTEX API
84// Within tinyusb, mutex is never used in ISR context
85//--------------------------------------------------------------------+
86typedef osal_semaphore_def_t osal_mutex_def_t;
87typedef osal_semaphore_t osal_mutex_t;
88
89#if OSAL_MUTEX_REQUIRED
90// Note: multiple cores MCUs usually do provide IPC API for mutex
91// or we can use std atomic function
92
93TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
94{
95 mdef->count = 1;
96 return mdef;
97}
98
99TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
100{
101 return osal_semaphore_wait(mutex_hdl, msec);
102}
103
104TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
105{
106 return osal_semaphore_post(mutex_hdl, false);
107}
108
109#else
110
111#define osal_mutex_create(_mdef) (NULL)
112#define osal_mutex_lock(_mutex_hdl, _ms) (true)
113#define osal_mutex_unlock(_mutex_hdl) (true)
114
115#endif
116
117//--------------------------------------------------------------------+
118// QUEUE API
119//--------------------------------------------------------------------+
120#include "common/tusb_fifo.h"
121
122typedef struct
123{
124 void (*interrupt_set)(bool);
125 tu_fifo_t ff;
127
128typedef osal_queue_def_t* osal_queue_t;
129
130// _int_set is used as mutex in OS NONE (disable/enable USB ISR)
131#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
132 uint8_t _name##_buf[_depth*sizeof(_type)]; \
133 osal_queue_def_t _name = { \
134 .interrupt_set = _int_set, \
135 .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \
136 }
137
138// lock queue by disable USB interrupt
139TU_ATTR_ALWAYS_INLINE static inline void _osal_q_lock(osal_queue_t qhdl)
140{
141 // disable dcd/hcd interrupt
142 qhdl->interrupt_set(false);
143}
144
145// unlock queue
146TU_ATTR_ALWAYS_INLINE static inline void _osal_q_unlock(osal_queue_t qhdl)
147{
148 // enable dcd/hcd interrupt
149 qhdl->interrupt_set(true);
150}
151
152TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
153{
154 tu_fifo_clear(&qdef->ff);
155 return (osal_queue_t) qdef;
156}
157
158TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec)
159{
160 (void) msec; // not used, always behave as msec = 0
161
162 _osal_q_lock(qhdl);
163 bool success = tu_fifo_read(&qhdl->ff, data);
164 _osal_q_unlock(qhdl);
165
166 return success;
167}
168
169TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
170{
171 if (!in_isr) {
172 _osal_q_lock(qhdl);
173 }
174
175 bool success = tu_fifo_write(&qhdl->ff, data);
176
177 if (!in_isr) {
178 _osal_q_unlock(qhdl);
179 }
180
181 TU_ASSERT(success);
182
183 return success;
184}
185
186TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl)
187{
188 // Skip queue lock/unlock since this function is primarily called
189 // with interrupt disabled before going into low power mode
190 return tu_fifo_empty(&qhdl->ff);
191}
192
193#ifdef __cplusplus
194 }
195#endif
196
197#endif /* _TUSB_OSAL_NONE_H_ */
Definition osal_freertos.h:58
Definition osal_none.h:47
Definition tusb_fifo.h:108