shake2wake.h

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/*
 * MikroSDK - MikroE Software Development Kit
 * Copyright© 2020 MikroElektronika d.o.o.
 * 
 * Permission is hereby granted, free of charge, to any person 
 * obtaining a copy of this software and associated documentation 
 * files (the "Software"), to deal in the Software without restriction, 
 * including without limitation the rights to use, copy, modify, merge, 
 * publish, distribute, sublicense, and/or sell copies of the Software, 
 * and to permit persons to whom the Software is furnished to do so, 
 * subject to the following conditions:
 * 
 * The above copyright notice and this permission notice shall be 
 * included in all copies or substantial portions of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
 * OR OTHER DEALINGS IN THE SOFTWARE. 
 */
 
// ----------------------------------------------------------------------------
 
#ifndef SHAKE2WAKE_H
#define SHAKE2WAKE_H
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
 
 
// -------------------------------------------------------------- PUBLIC MACROS 
#define SHAKE2WAKE_MAP_MIKROBUS( cfg, mikrobus ) \
   cfg.miso  = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
   cfg.mosi  = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
   cfg.sck   = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
   cfg.cs    = MIKROBUS( mikrobus, MIKROBUS_CS ); \
   cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT );
#define SHAKE2WAKE_MAP_MIKROBUS( cfg, mikrobus ) \ …
#define SHAKE2WAKE_OK                                   0x00
#define SHAKE2WAKE_ERROR                                0xFF
#define SHAKE2WAKE_WRITE_REG                            0x0A
#define SHAKE2WAKE_READ_REG                             0x0B
#define SHAKE2WAKE_READ_FIFO                            0x0D
#define SHAKE2WAKE_REG_DEVID_AD                         0x00
#define SHAKE2WAKE_REG_DEVID_MST                        0x01
#define SHAKE2WAKE_REG_PARTID                           0x02
#define SHAKE2WAKE_REG_REVID                            0x03
#define SHAKE2WAKE_REG_XDATA                            0x08
#define SHAKE2WAKE_REG_YDATA                            0x09
#define SHAKE2WAKE_REG_ZDATA                            0x0A
#define SHAKE2WAKE_REG_STATUS                           0x0B
#define SHAKE2WAKE_REG_FIFO_L                           0x0C
#define SHAKE2WAKE_REG_FIFO_H                           0x0D
#define SHAKE2WAKE_REG_XDATA_L                          0x0E
#define SHAKE2WAKE_REG_XDATA_H                          0x0F
#define SHAKE2WAKE_REG_YDATA_L                          0x10
#define SHAKE2WAKE_REG_YDATA_H                          0x11
#define SHAKE2WAKE_REG_ZDATA_L                          0x12
#define SHAKE2WAKE_REG_ZDATA_H                          0x13
#define SHAKE2WAKE_REG_TEMP_L                           0x14
#define SHAKE2WAKE_REG_TEMP_H                           0x15
#define SHAKE2WAKE_REG_SOFT_RESET                       0x1F
#define SHAKE2WAKE_REG_THRESH_ACT_L                     0x20
#define SHAKE2WAKE_REG_THRESH_ACT_H                     0x21
#define SHAKE2WAKE_REG_TIME_ACT                         0x22
#define SHAKE2WAKE_REG_THRESH_INACT_L                   0x23
#define SHAKE2WAKE_REG_THRESH_INACT_H                   0x24
#define SHAKE2WAKE_REG_TIME_INACT_L                     0x25
#define SHAKE2WAKE_REG_TIME_INACT_H                     0x26
#define SHAKE2WAKE_REG_ACT_INACT_CTL                    0x27
#define SHAKE2WAKE_REG_FIFO_CTL                         0x28
#define SHAKE2WAKE_REG_FIFO_SAMPLES                     0x29
#define SHAKE2WAKE_REG_INTMAP1                          0x2A
#define SHAKE2WAKE_REG_INTMAP2                          0x2B
#define SHAKE2WAKE_REG_FILTER_CTL                       0x2C
#define SHAKE2WAKE_REG_POWER_CTL                        0x2D
#define SHAKE2WAKE_REG_SELF_TEST                        0x2E
#define SHAKE2WAKE_STATUS_ERR_USER_REGS               ( 1 << 7 )
#define SHAKE2WAKE_STATUS_AWAKE                       ( 1 << 6 )
#define SHAKE2WAKE_STATUS_INACT                       ( 1 << 5 )
#define SHAKE2WAKE_STATUS_ACT                         ( 1 << 4 )
#define SHAKE2WAKE_STATUS_FIFO_OVERRUN                ( 1 << 3 )
#define SHAKE2WAKE_STATUS_FIFO_WATERMARK              ( 1 << 2 )
#define SHAKE2WAKE_STATUS_FIFO_RDY                    ( 1 << 1 )
#define SHAKE2WAKE_STATUS_DATA_RDY                      1
#define SHAKE2WAKE_CTL_LINKLOOP_MODE_DEFAULT        ( ( 0 & 0x03 ) << 4 )
#define SHAKE2WAKE_CTL_LINKLOOP_MODE_LINK           ( ( 1 & 0x03 ) << 4 )
#define SHAKE2WAKE_CTL_LINKLOOP_MODE_LOOP           ( ( 3 & 0x03 ) << 4 )
#define SHAKE2WAKE_ACT_INACT_CTL_INACT_REF          ( 1 << 3 )
#define SHAKE2WAKE_ACT_INACT_CTL_INACT_EN           ( 1 << 2 )
#define SHAKE2WAKE_ACT_INACT_CTL_ACT_REF            ( 1 << 1 )
#define SHAKE2WAKE_ACT_INACT_CTL_ACT_EN               1
#define SHAKE2WAKE_FIFO_CTL_AH                      ( 1 << 3 )
#define SHAKE2WAKE_FIFO_CTL_FIFO_TEMP               ( 1 << 2 )
#define SHAKE2WAKE_FIFO_CTL_FIFO_MODE_DIS           ( 0 & 0x03 )
#define SHAKE2WAKE_FIFO_CTL_FIFO_MODE_OSM           ( 1 & 0x03 )
#define SHAKE2WAKE_FIFO_CTL_FIFO_MODE_STREAM        ( 2 & 0x03 )
#define SHAKE2WAKE_FIFO_CTL_FIFO_MODE_TRIG          ( 3 & 0x03 )
#define SHAKE2WAKE_INTMAP1_INT_LOW                  ( 1 << 7 )
#define SHAKE2WAKE_INTMAP1_AWAKE                    ( 1 << 6 )
#define SHAKE2WAKE_INTMAP1_INACT                    ( 1 << 5 )
#define SHAKE2WAKE_INTMAP1_ACT                      ( 1 << 4 )
#define SHAKE2WAKE_INTMAP1_FIFO_OVERRUN             ( 1 << 3 )
#define SHAKE2WAKE_INTMAP1_FIFO_WATERMARK           ( 1 << 2 )
#define SHAKE2WAKE_INTMAP1_FIFO_READY               ( 1 << 1 )
#define SHAKE2WAKE_INTMAP1_DATA_READY                 1
#define SHAKE2WAKE_INTMAP2_INT_LOW                  ( 1 << 7 )
#define SHAKE2WAKE_INTMAP2_AWAKE                    ( 1 << 6 )
#define SHAKE2WAKE_INTMAP2_INACT                    ( 1 << 5 )
#define SHAKE2WAKE_INTMAP2_ACT                      ( 1 << 4 )
#define SHAKE2WAKE_INTMAP2_FIFO_OVERRUN             ( 1 << 3 )
#define SHAKE2WAKE_INTMAP2_FIFO_WATERMARK           ( 1 << 2 )
#define SHAKE2WAKE_INTMAP2_FIFO_READY               ( 1 << 1 )
#define SHAKE2WAKE_INTMAP2_DATA_READY                 1
#define SHAKE2WAKE_FILTER_CTL_RANGE_2_G           ( ( 0 & 0x3 ) << 6 )
#define SHAKE2WAKE_FILTER_CTL_RANGE_4_G           ( ( 1 & 0x3 ) << 6 )
#define SHAKE2WAKE_FILTER_CTL_RANGE_8_G           ( ( 2 & 0x3 ) << 6 )
#define SHAKE2WAKE_FILTER_CTL_RES                   ( 1 << 5 )
#define SHAKE2WAKE_FILTER_CTL_HALF_BW               ( 1 << 4 )
#define SHAKE2WAKE_FILTER_CTL_EXT_SAMPLE            ( 1 << 3 )
#define SHAKE2WAKE_FILTER_CTL_ODR_12_5              ( 0 & 0x07 )
#define SHAKE2WAKE_FILTER_CTL_ODR_25                ( 1 & 0x07 )
#define SHAKE2WAKE_FILTER_CTL_ODR_50                ( 2 & 0x07 )
#define SHAKE2WAKE_FILTER_CTL_ODR_100               ( 3 & 0x07 )
#define SHAKE2WAKE_FILTER_CTL_ODR_200               ( 4 & 0x07 )
#define SHAKE2WAKE_FILTER_CTL_ODR_400               ( 7 & 0x07 )
#define SHAKE2WAKE_POWER_CTL_RES                     ( 1 << 7 )
#define SHAKE2WAKE_POWER_CTL_EXT_CLK                 ( 1 << 6 )
#define SHAKE2WAKE_POWER_CTL_LOW_NOISE_MODE_NORMAL   ( ( 0 & 0x03 ) << 4 )
#define SHAKE2WAKE_POWER_CTL_LOW_NOISE_MODE_LOW      ( ( 1 & 0x03 ) << 4 )
#define SHAKE2WAKE_POWER_CTL_LOW_NOISE_MODE_ULTRALOW ( ( 2 & 0x03 ) << 4 )
#define SHAKE2WAKE_POWER_CTL_WAKEUP                  ( 1 << 3 )
#define SHAKE2WAKE_POWER_CTL_AUTOSLEEP               ( 1 << 2 )
#define SHAKE2WAKE_POWER_CTL_MEASURE_STD_BY          ( 0x00 )
#define SHAKE2WAKE_POWER_CTL_MEASURE_MODE            ( 0x02 )
#define SHAKE2WAKE_SELF_TEST_ST                        1
#define SHAKE2WAKE_DEVICE_AD                           0xAD
#define SHAKE2WAKE_DEVICE_MST                          0x1D
#define SHAKE2WAKE_PART_ID                             0xF2
#define SHAKE2WAKE_RESET_KEY                           0x52
 // End group macro 
// --------------------------------------------------------------- PUBLIC TYPES
typedef struct
{
    // Input pins 
    digital_in_t int_pin;
    
    // Modules 
    spi_master_t spi;
    pin_name_t chip_select;
 
} shake2wake_t;
typedef struct {…};
 
typedef struct
{
    // Communication gpio pins 
    pin_name_t miso;
    pin_name_t mosi;
    pin_name_t sck;
    pin_name_t cs;
 
    // Additional gpio pins 
    pin_name_t int_pin;
 
    // static variable 
    uint32_t spi_speed;
    spi_master_mode_t   spi_mode;
    spi_master_chip_select_polarity_t cs_polarity;
 
} shake2wake_cfg_t;
typedef struct {…};
 
 // End types group
// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
 
#ifdef __cplusplus
extern "C"{
#endif
 
void shake2wake_cfg_setup ( shake2wake_cfg_t *cfg );
 
err_t shake2wake_init ( shake2wake_t *ctx, shake2wake_cfg_t *cfg );
 
void shake2wake_default_cfg ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_byte ( shake2wake_t *ctx, uint8_t rd_addr );
 
void shake2wake_write_byte ( shake2wake_t *ctx, uint8_t wr_addr, uint8_t wr_val );
 
void shake2wake_write_two_byte ( shake2wake_t *ctx, uint8_t reg_addr, uint16_t reg_val, uint8_t cnt );
 
void shake2wake_read_multiple_byte ( shake2wake_t *ctx, uint8_t reg_addr, uint8_t *prd_data, uint8_t cnt );
 
void shake2wake_fifo_read ( shake2wake_t *ctx, uint8_t *p_buff, uint16_t cnt );
 
uint8_t shake2wake_read_dev_id_ad ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_dev_id_mst ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_part_id ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_revision ( shake2wake_t *ctx );
 
void shake2wake_soft_reset ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_status ( shake2wake_t *ctx );
 
uint16_t shake2wake_read_fifo_ent ( shake2wake_t *ctx );
 
void shake2wake_get_lo_res_raw_data ( shake2wake_t *ctx, int8_t *x_val, int8_t *y_val, int8_t *z_val );
 
void shake2wake_get_raw_data ( shake2wake_t *ctx, int16_t *x_val, int16_t *y_val, int16_t *z_val );
 
float shake2wake_read_temperature ( shake2wake_t *ctx );
 
void shake2wake_stand_by_mode ( shake2wake_t *ctx );
 
void shake2wake_measure_mode ( shake2wake_t *ctx );
 
void shake2wake_auto_sleep_mode ( shake2wake_t *ctx );
 
void shake2wake_wake_up ( shake2wake_t *ctx );
 
void shake2wake_set_low_noise_mode ( shake2wake_t *ctx, uint8_t low_noise );
 
void shake2wake_extern_clk ( shake2wake_t *ctx );
 
void shake2wake_set_range ( shake2wake_t *ctx, uint8_t range );
 
void shake2wake_sel_hal_bandw ( shake2wake_t *ctx );
 
void shake2wake_set_ext_samp_trg ( shake2wake_t *ctx );
 
void shake2wake_set_out_data_rate ( shake2wake_t *ctx, uint8_t odr );
 
void shake2wake_get_data_g ( shake2wake_t *ctx, float *x_val, float *y_val, float *z_val );
 
void shake2wake_set_fifo_above_half ( shake2wake_t *ctx );
 
void shake2wake_store_temp ( shake2wake_t *ctx );
 
void shake2wake_set_fifo_mode ( shake2wake_t *ctx, uint8_t mode );
 
uint8_t shake2wake_read_filter_ctl ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_power_ctl ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_fifo_ctl ( shake2wake_t *ctx );
 
uint8_t shake2wake_read_act_inact_ctl ( shake2wake_t *ctx );
 
void shake2wake_set_act_enable ( shake2wake_t *ctx );
 
void shake2wake_set_ref_act ( shake2wake_t *ctx );
 
void shake2wake_set_inact_enable ( shake2wake_t *ctx );
 
void shake2wake_set_ref_inact ( shake2wake_t *ctx );
 
void shake2wake_sel_link_loop_mode ( shake2wake_t *ctx, uint8_t mode );
 
void shake2wake_set_act_trsh ( shake2wake_t *ctx, uint16_t act_trsh );
 
int16_t shake2wake_read_act_trsh ( shake2wake_t *ctx );
 
void shake2wake_set_act_time ( shake2wake_t *ctx, uint8_t ac_time );
 
uint8_t shake2wake_read_act_time ( shake2wake_t *ctx );
 
void shake2wake_set_inact_trsh ( shake2wake_t *ctx, uint16_t inact_trsh );
 
int16_t shake2wake_read_inact_trsh ( shake2wake_t *ctx );
 
void shake2wake_set_inact_time ( shake2wake_t *ctx, uint16_t inac_time );
 
uint16_t shake2wake_read_inact_time ( shake2wake_t *ctx );
 
void shake2wake_write_int_1_map ( shake2wake_t *ctx, uint8_t wr_data );
 
uint8_t shake2wake_read_int_1_map ( shake2wake_t *ctx );
 
void shake2wake_write_int_2_map ( shake2wake_t *ctx, uint8_t wr_data );
 
uint8_t shake2wake_read_int_2_map ( shake2wake_t *ctx );
 
void shake2wake_write_fifo_samp ( shake2wake_t *ctx, uint8_t samp );
 
uint8_t shake2wake_read_fifo_samp ( shake2wake_t *ctx );
 
uint8_t shake2wake_check_int ( shake2wake_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif  // _SHAKE2WAKE_H_
 
 // End public_function group
 
// ------------------------------------------------------------------------- END