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#define | SILENTSTEP2_GSTAT_RESET 0x00000001ul |
| Silent Step 2 global status flags.
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#define | SILENTSTEP2_GSTAT_DRV_ERR 0x00000002ul |
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#define | SILENTSTEP2_GSTAT_UV_CP 0x00000004ul |
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#define | SILENTSTEP2_GCONF_I_SC_AN_OP_NORMAL 0x00 |
| Silent Step 2 global configuration flags.
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#define | SILENTSTEP2_GCONF_I_SC_AN_AIN 0x01 |
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#define | SILENTSTEP2_GCONF_INT_RSE_OP_NORMAL 0x00 |
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#define | SILENTSTEP2_GCONF_INT_RSE_INT_RSE 0x01 |
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#define | SILENTSTEP2_GCONF_DISABLE 0x00 |
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#define | SILENTSTEP2_GCONF_ENABLE 0x01 |
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#define | SILENTSTEP2_THIGH_DEFAULT 0x00000300ul |
| Silent Step 2 velocity setting for different chopper modes and full stepping to maximize torque.
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#define | SILENTSTEP2_THIGH_MAX 0x000FFFFFul |
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#define | SILENTSTEP2_TCOOLTHRS_DEFAULT 0x00002700ul |
| Silent Step 2 threshold velocity for switching on smart energy.
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#define | SILENTSTEP2_TCOOLTHRS_MAX 0x000FFFFFul |
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#define | SILENTSTEP2_CHOPCONF_SEMIN_0 0x00 |
| Silent Step 2 coolStep smart current control register and stallGuard2 configuration.
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#define | SILENTSTEP2_CHOPCONF_SEMIN_BIT_MASK 0x0F |
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#define | SILENTSTEP2_CHOPCONF_SEUP_1 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SEUP_2 0x01 |
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#define | SILENTSTEP2_CHOPCONF_SEUP_3 0x02 |
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#define | SILENTSTEP2_CHOPCONF_SEUP_8 0x03 |
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#define | SILENTSTEP2_CHOPCONF_SEMAX_0 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SEMAX_BIT_MASK 0x0F |
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#define | SILENTSTEP2_CHOPCONF_SEDN_32 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SEDN_8 0x01 |
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#define | SILENTSTEP2_CHOPCONF_SEDN_2 0x02 |
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#define | SILENTSTEP2_CHOPCONF_SEDN_1 0x03 |
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#define | SILENTSTEP2_CHOPCONF_SEIMIN_1_2 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SEIMIN_1_4 0x01 |
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#define | SILENTSTEP2_CHOPCONF_SGT_M64 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SGT_P64 0x7F |
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#define | SILENTSTEP2_CHOPCONF_SFILT_MODE_STD 0x00 |
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#define | SILENTSTEP2_CHOPCONF_SFILT_MODE_FLTR 0x01 |
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#define | SILENTSTEP2_IHOLD_10_32 0x0A |
| Silent Step 2 coolStep smart current control register and stallGuard2 configuration.
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#define | SILENTSTEP2_IHOLD_BIT_MASK 0x1F |
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#define | SILENTSTEP2_IRUN_10_32 0x0A |
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#define | SILENTSTEP2_IRUN_BIT_MASK 0x1F |
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#define | SILENTSTEP2_IHOLDDELAY_PWR_DOWN 0x00 |
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#define | SILENTSTEP2_IHOLDDELAY_32 0x05 |
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#define | SILENTSTEP2_IHOLDDELAY_BIT_MASK 0x0F |
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#define | SILENTSTEP2_TOFF_DIS 0x00 |
| Silent Step 2 off time setting controls duration of slow decay phase.
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#define | SILENTSTEP2_TOFF_NCLK_140 0x04 |
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#define | SILENTSTEP2_TOFF_BIT_MASK 0x0F |
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#define | SILENTSTEP2_STEP_SPEED_MIN 1 |
| Silent Step 2 step speed and angle data values.
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#define | SILENTSTEP2_STEP_SPEED_MAX 100 |
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#define | SILENTSTEP2_ANGLE_360_DEGREES 360.0f |
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#define | SILENTSTEP2_CHOPCONF_CHM_MODE_STND 0x00 |
| Silent Step 2 chopper and driver configuration.
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#define | SILENTSTEP2_CHOPCONF_CHM_CONST_OFF_TIME 0x01 |
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#define | SILENTSTEP2_CHOPCONF_CHM_BIT_MASK 0x00004000ul |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_M3 0x00 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_M2 0x01 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_M1 0x02 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_0 0x03 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_1 0x04 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_2 0x05 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_3 0x06 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_4 0x07 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_5 0x08 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_6 0x09 |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_7 0x0A |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_8 0x0B |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_9 0x0C |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_10 0x0D |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_11 0x0E |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_12 0x0F |
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#define | SILENTSTEP2_CHOPCONF_HE_OS_BIT_MASK 0x00000780ul |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_0 0x00 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_1 0x01 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_2 0x02 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_3 0x03 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_4 0x04 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_5 0x05 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_6 0x06 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_7 0x07 |
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#define | SILENTSTEP2_CHOPCONF_HSTRT_TFD_BIT_MASK 0x00000070ul |
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#define | SILENTSTEP2_MSLUT_SEL_0 0x00 |
| Silent Step 2 microstep table entries and defines four segments values.
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#define | SILENTSTEP2_MSLUT_SEL_1 0x01 |
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#define | SILENTSTEP2_MSLUT_SEL_2 0x02 |
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#define | SILENTSTEP2_MSLUT_SEL_3 0x03 |
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#define | SILENTSTEP2_MSLUT_SEL_4 0x04 |
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#define | SILENTSTEP2_MSLUT_SEL_5 0x05 |
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#define | SILENTSTEP2_MSLUT_SEL_6 0x06 |
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#define | SILENTSTEP2_MSLUT_SEL_7 0x07 |
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#define | SILENTSTEP2_MSLUTSEL_WIDTH_BIT_MASK 0x000000FFul |
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#define | SILENTSTEP2_MSLUTSEL_SEG_BIT_MASK 0x00FFFFFFul |
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#define | SILENTSTEP2_MSLUTSTART_SIN_BIT_MASK 0x000000FFul |
| Silent Step 2 absolute current at microstep table entry values.
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#define | SILENTSTEP2_MSLUTSTART_SIN90_BIT_MASK 0x000000FFul |
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#define | SILENTSTEP2_CHOPCONF_MRES_BIT_MASK 0xF0FFFFFFul |
| Silent Step 2 chopper configuration bit masks values.
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#define | SILENTSTEP2_CHOPCONF_DEDGE_BIT_MASK 0xDFFFFFFFul |
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#define | SILENTSTEP2_CHOPCONF_INTPOL_BIT_MASK 0xEFFFFFFFul |
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#define | SILENTSTEP2_CHOPCONF_TBL_BIT_MASK 0xFFFE7FFFul |
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#define | SILENTSTEP2_CHOPCONF_TOFF_BIT_MASK 0xFFFFFFF0ul |
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#define | SILENTSTEP2_PIN_NONE 0x00 |
| Silent Step 2 GPIO expander pin setting.
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#define | SILENTSTEP2_PIN_EN 0x01 |
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#define | SILENTSTEP2_PIN_FT1 0x02 |
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#define | SILENTSTEP2_PIN_FT2 0x04 |
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#define | SILENTSTEP2_PIN_ALL 0x07 |
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#define | SILENTSTEP2_DIRECTION_COUNTERCLOCKWISE 0 |
| Silent Step 2 step/direction driver mode.
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#define | SILENTSTEP2_DIRECTION_CLOCKWISE 1 |
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#define | SILENTSTEP2_STEP_DELAY_DEFAULT_100US 100ul |
| Silent Step 2 step delay default value.
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#define | SILENTSTEP2_DEVICE_ADDRESS_0 0x70 |
| Silent Step 2 device address setting.
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#define | SILENTSTEP2_DEVICE_ADDRESS_1 0x72 |
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#define | SILENTSTEP2_DEVICE_ADDRESS_2 0x74 |
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#define | SILENTSTEP2_DEVICE_ADDRESS_3 0x76 |
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#define | SILENTSTEP2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
| Data sample selection.
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#define | SILENTSTEP2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
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