Settings for registers of Silent Step 3 Click driver. More...

Macros
#define	SILENTSTEP3_DRVCTRL_1_PHA_MASK 0x20000ul
	Silent Step 3 DRVCTRL (SDOFF=1) register setting.

#define	SILENTSTEP3_DRVCTRL_1_CA_MASK 0x1FE00ul

#define	SILENTSTEP3_DRVCTRL_1_PHB_MASK 0x00100ul

#define	SILENTSTEP3_DRVCTRL_1_CB_MASK 0x000FFul

#define	SILENTSTEP3_DRVCTRL_0_INTPOL_MASK 0x00200ul
	Silent Step 3 DRVCTRL (SDOFF=0) register setting.

#define	SILENTSTEP3_DRVCTRL_0_DEDGE_MASK 0x00100ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_256 0x00000ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_128 0x00001ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_64 0x00002ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_32 0x00003ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_16 0x00004ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_8 0x00005ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_4 0x00006ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_2 0x00007ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_1 0x00008ul

#define	SILENTSTEP3_DRVCTRL_0_MRES_MASK 0x0000Ful

#define	SILENTSTEP3_CHOPCONF_TBL_16 0x00000ul
	Silent Step 3 CHOPCONF register setting.

#define	SILENTSTEP3_CHOPCONF_TBL_24 0x08000ul

#define	SILENTSTEP3_CHOPCONF_TBL_32 0x10000ul

#define	SILENTSTEP3_CHOPCONF_TBL_54 0x18000ul

#define	SILENTSTEP3_CHOPCONF_TBL_MASK 0x18000ul

#define	SILENTSTEP3_CHOPCONF_CHM_STANDARD 0x00000ul

#define	SILENTSTEP3_CHOPCONF_CHM_FAST 0x04000ul

#define	SILENTSTEP3_CHOPCONF_CHM_MASK 0x04000ul

#define	SILENTSTEP3_CHOPCONF_RNDTF_DISABLE 0x00000ul

#define	SILENTSTEP3_CHOPCONF_RNDTF_ENABLE 0x02000ul

#define	SILENTSTEP3_CHOPCONF_RNDTF_MASK 0x02000ul

#define	SILENTSTEP3_CHOPCONF_HDEC_16 0x00000ul

#define	SILENTSTEP3_CHOPCONF_HDEC_32 0x00800ul

#define	SILENTSTEP3_CHOPCONF_HDEC_48 0x01000ul

#define	SILENTSTEP3_CHOPCONF_HDEC_64 0x01800ul

#define	SILENTSTEP3_CHOPCONF_HDEC_MASK 0x01800ul

#define	SILENTSTEP3_CHOPCONF_HEND_0 0x00180ul

#define	SILENTSTEP3_CHOPCONF_HEND_MASK 0x00780ul

#define	SILENTSTEP3_CHOPCONF_HSTRT_4 0x00030ul

#define	SILENTSTEP3_CHOPCONF_HSTRT_MASK 0x00070ul

#define	SILENTSTEP3_CHOPCONF_TOFF_4 0x00004ul

#define	SILENTSTEP3_CHOPCONF_TOFF_MASK 0x0000Ful

#define	SILENTSTEP3_SMARTEN_SEIMIN_HALF_CS 0x00000ul
	Silent Step 3 SMARTEN register setting.

#define	SILENTSTEP3_SMARTEN_SEIMIN_QUARTER_CS 0x08000ul

#define	SILENTSTEP3_SMARTEN_SEIMIN_MASK 0x08000ul

#define	SILENTSTEP3_SMARTEN_SEDN_32 0x00000ul

#define	SILENTSTEP3_SMARTEN_SEDN_8 0x02000ul

#define	SILENTSTEP3_SMARTEN_SEDN_2 0x04000ul

#define	SILENTSTEP3_SMARTEN_SEDN_1 0x06000ul

#define	SILENTSTEP3_SMARTEN_SEDN_MASK 0x06000ul

#define	SILENTSTEP3_SMARTEN_SEMAX_2 0x00200ul

#define	SILENTSTEP3_SMARTEN_SEMAX_MASK 0x00F00ul

#define	SILENTSTEP3_SMARTEN_SEUP_1 0x00000ul

#define	SILENTSTEP3_SMARTEN_SEUP_2 0x00020ul

#define	SILENTSTEP3_SMARTEN_SEUP_4 0x00040ul

#define	SILENTSTEP3_SMARTEN_SEUP_8 0x00060ul

#define	SILENTSTEP3_SMARTEN_SEUP_MASK 0x00060ul

#define	SILENTSTEP3_SMARTEN_SEMIN_2 0x00002ul

#define	SILENTSTEP3_SMARTEN_SEMIN_MASK 0x0000Ful

#define	SILENTSTEP3_SGCSCONF_SFILT_STANDARD 0x00000ul
	Silent Step 3 SGCSCONF register setting.

#define	SILENTSTEP3_SGCSCONF_SFILT_FILTERED 0x10000ul

#define	SILENTSTEP3_SGCSCONF_SFILT_MASK 0x10000ul

#define	SILENTSTEP3_SGCSCONF_SGT_0 0x00000ul

#define	SILENTSTEP3_SGCSCONF_SGT_MASK 0x07F00ul

#define	SILENTSTEP3_SGCSCONF_CS_2_OF_32 0x00002ul

#define	SILENTSTEP3_SGCSCONF_CS_MASK 0x0001Ful

#define	SILENTSTEP3_DRVCONF_TST_MASK 0x10000ul
	Silent Step 3 DRVCONF register setting.

#define	SILENTSTEP3_DRVCONF_SLPH_MIN 0x00000ul

#define	SILENTSTEP3_DRVCONF_SLPH_MIN_TEMP 0x04000ul

#define	SILENTSTEP3_DRVCONF_SLPH_MED_TEMP 0x08000ul

#define	SILENTSTEP3_DRVCONF_SLPH_MAX 0x0C000ul

#define	SILENTSTEP3_DRVCONF_SLPH_MASK 0x0C000ul

#define	SILENTSTEP3_DRVCONF_SLPL_MIN 0x00000ul

#define	SILENTSTEP3_DRVCONF_SLPL_MIN_TEMP 0x01000ul

#define	SILENTSTEP3_DRVCONF_SLPL_MED_TEMP 0x02000ul

#define	SILENTSTEP3_DRVCONF_SLPL_MAX 0x03000ul

#define	SILENTSTEP3_DRVCONF_SLPL_MASK 0x03000ul

#define	SILENTSTEP3_DRVCONF_DISS2G_ENABLE 0x00000ul

#define	SILENTSTEP3_DRVCONF_DISS2G_DISABLE 0x00400ul

#define	SILENTSTEP3_DRVCONF_DISS2G_MASK 0x00400ul

#define	SILENTSTEP3_DRVCONF_TS2G_3_2US 0x00000ul

#define	SILENTSTEP3_DRVCONF_TS2G_1_6US 0x00100ul

#define	SILENTSTEP3_DRVCONF_TS2G_1_2US 0x00200ul

#define	SILENTSTEP3_DRVCONF_TS2G_0_8US 0x00300ul

#define	SILENTSTEP3_DRVCONF_TS2G_MASK 0x00300ul

#define	SILENTSTEP3_DRVCONF_SDOFF_0 0x00000ul

#define	SILENTSTEP3_DRVCONF_SDOFF_1 0x00080ul

#define	SILENTSTEP3_DRVCONF_SDOFF_MASK 0x00080ul

#define	SILENTSTEP3_DRVCONF_VSENSE_305MV 0x00000ul

#define	SILENTSTEP3_DRVCONF_VSENSE_165MV 0x00040ul

#define	SILENTSTEP3_DRVCONF_VSENSE_MASK 0x00040ul

#define	SILENTSTEP3_DRVCONF_RDSEL_MSTEP 0x00000ul

#define	SILENTSTEP3_DRVCONF_RDSEL_SG_LEVEL 0x00010ul

#define	SILENTSTEP3_DRVCONF_RDSEL_SG_CS_LEVEL 0x00020ul

#define	SILENTSTEP3_DRVCONF_RDSEL_MASK 0x00030ul

#define	SILENTSTEP3_PIN_STATE_LOW 0
	Silent Step 3 pin logic state setting.

#define	SILENTSTEP3_PIN_STATE_HIGH 1

#define	SILENTSTEP3_DIR_CCW 0
	Silent Step 3 direction setting.

#define	SILENTSTEP3_DIR_CW 1

#define	SILENTSTEP3_MODE_FULL_STEP 8
	Silent Step 3 step resolution setting.

#define	SILENTSTEP3_MODE_HALF_STEP 7

#define	SILENTSTEP3_MODE_QUARTER_STEP 6

#define	SILENTSTEP3_MODE_1_OVER_8_STEP 5

#define	SILENTSTEP3_MODE_1_OVER_16_STEP 4

#define	SILENTSTEP3_MODE_1_OVER_32_STEP 3

#define	SILENTSTEP3_MODE_1_OVER_64_STEP 2

#define	SILENTSTEP3_MODE_1_OVER_128_STEP 1

#define	SILENTSTEP3_MODE_1_OVER_256_STEP 0

#define	SILENTSTEP3_SPEED_VERY_SLOW 0
	Silent Step 3 device speed settings.

#define	SILENTSTEP3_SPEED_SLOW 1

#define	SILENTSTEP3_SPEED_MEDIUM 2

#define	SILENTSTEP3_SPEED_FAST 3

#define	SILENTSTEP3_SPEED_VERY_FAST 4

#define	SILENTSTEP3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.

#define	SILENTSTEP3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of Silent Step 3 Click driver.

Macro Definition Documentation

◆ SILENTSTEP3_CHOPCONF_CHM_FAST

#define SILENTSTEP3_CHOPCONF_CHM_FAST 0x04000ul

◆ SILENTSTEP3_CHOPCONF_CHM_MASK

#define SILENTSTEP3_CHOPCONF_CHM_MASK 0x04000ul

◆ SILENTSTEP3_CHOPCONF_CHM_STANDARD

#define SILENTSTEP3_CHOPCONF_CHM_STANDARD 0x00000ul

◆ SILENTSTEP3_CHOPCONF_HDEC_16

#define SILENTSTEP3_CHOPCONF_HDEC_16 0x00000ul

◆ SILENTSTEP3_CHOPCONF_HDEC_32

#define SILENTSTEP3_CHOPCONF_HDEC_32 0x00800ul

◆ SILENTSTEP3_CHOPCONF_HDEC_48

#define SILENTSTEP3_CHOPCONF_HDEC_48 0x01000ul

◆ SILENTSTEP3_CHOPCONF_HDEC_64

#define SILENTSTEP3_CHOPCONF_HDEC_64 0x01800ul

◆ SILENTSTEP3_CHOPCONF_HDEC_MASK

#define SILENTSTEP3_CHOPCONF_HDEC_MASK 0x01800ul

◆ SILENTSTEP3_CHOPCONF_HEND_0

#define SILENTSTEP3_CHOPCONF_HEND_0 0x00180ul

◆ SILENTSTEP3_CHOPCONF_HEND_MASK

#define SILENTSTEP3_CHOPCONF_HEND_MASK 0x00780ul

◆ SILENTSTEP3_CHOPCONF_HSTRT_4

#define SILENTSTEP3_CHOPCONF_HSTRT_4 0x00030ul

◆ SILENTSTEP3_CHOPCONF_HSTRT_MASK

#define SILENTSTEP3_CHOPCONF_HSTRT_MASK 0x00070ul

◆ SILENTSTEP3_CHOPCONF_RNDTF_DISABLE

#define SILENTSTEP3_CHOPCONF_RNDTF_DISABLE 0x00000ul

◆ SILENTSTEP3_CHOPCONF_RNDTF_ENABLE

#define SILENTSTEP3_CHOPCONF_RNDTF_ENABLE 0x02000ul

◆ SILENTSTEP3_CHOPCONF_RNDTF_MASK

#define SILENTSTEP3_CHOPCONF_RNDTF_MASK 0x02000ul

◆ SILENTSTEP3_CHOPCONF_TBL_16

#define SILENTSTEP3_CHOPCONF_TBL_16 0x00000ul

Silent Step 3 CHOPCONF register setting.

Specified setting for CHOPCONF register of Silent Step 3 Click driver.

◆ SILENTSTEP3_CHOPCONF_TBL_24

#define SILENTSTEP3_CHOPCONF_TBL_24 0x08000ul

◆ SILENTSTEP3_CHOPCONF_TBL_32

#define SILENTSTEP3_CHOPCONF_TBL_32 0x10000ul

◆ SILENTSTEP3_CHOPCONF_TBL_54

#define SILENTSTEP3_CHOPCONF_TBL_54 0x18000ul

◆ SILENTSTEP3_CHOPCONF_TBL_MASK

#define SILENTSTEP3_CHOPCONF_TBL_MASK 0x18000ul

◆ SILENTSTEP3_CHOPCONF_TOFF_4

#define SILENTSTEP3_CHOPCONF_TOFF_4 0x00004ul

◆ SILENTSTEP3_CHOPCONF_TOFF_MASK

#define SILENTSTEP3_CHOPCONF_TOFF_MASK 0x0000Ful

◆ SILENTSTEP3_DIR_CCW

#define SILENTSTEP3_DIR_CCW 0

Silent Step 3 direction setting.

Specified setting for direction of Silent Step 3 Click driver.

◆ SILENTSTEP3_DIR_CW

#define SILENTSTEP3_DIR_CW 1

◆ SILENTSTEP3_DRVCONF_DISS2G_DISABLE

#define SILENTSTEP3_DRVCONF_DISS2G_DISABLE 0x00400ul

◆ SILENTSTEP3_DRVCONF_DISS2G_ENABLE

#define SILENTSTEP3_DRVCONF_DISS2G_ENABLE 0x00000ul

◆ SILENTSTEP3_DRVCONF_DISS2G_MASK

#define SILENTSTEP3_DRVCONF_DISS2G_MASK 0x00400ul

◆ SILENTSTEP3_DRVCONF_RDSEL_MASK

#define SILENTSTEP3_DRVCONF_RDSEL_MASK 0x00030ul

◆ SILENTSTEP3_DRVCONF_RDSEL_MSTEP

#define SILENTSTEP3_DRVCONF_RDSEL_MSTEP 0x00000ul

◆ SILENTSTEP3_DRVCONF_RDSEL_SG_CS_LEVEL

#define SILENTSTEP3_DRVCONF_RDSEL_SG_CS_LEVEL 0x00020ul

◆ SILENTSTEP3_DRVCONF_RDSEL_SG_LEVEL

#define SILENTSTEP3_DRVCONF_RDSEL_SG_LEVEL 0x00010ul

◆ SILENTSTEP3_DRVCONF_SDOFF_0

#define SILENTSTEP3_DRVCONF_SDOFF_0 0x00000ul

◆ SILENTSTEP3_DRVCONF_SDOFF_1

#define SILENTSTEP3_DRVCONF_SDOFF_1 0x00080ul

◆ SILENTSTEP3_DRVCONF_SDOFF_MASK

#define SILENTSTEP3_DRVCONF_SDOFF_MASK 0x00080ul

◆ SILENTSTEP3_DRVCONF_SLPH_MASK

#define SILENTSTEP3_DRVCONF_SLPH_MASK 0x0C000ul

◆ SILENTSTEP3_DRVCONF_SLPH_MAX

#define SILENTSTEP3_DRVCONF_SLPH_MAX 0x0C000ul

◆ SILENTSTEP3_DRVCONF_SLPH_MED_TEMP

#define SILENTSTEP3_DRVCONF_SLPH_MED_TEMP 0x08000ul

◆ SILENTSTEP3_DRVCONF_SLPH_MIN

#define SILENTSTEP3_DRVCONF_SLPH_MIN 0x00000ul

◆ SILENTSTEP3_DRVCONF_SLPH_MIN_TEMP

#define SILENTSTEP3_DRVCONF_SLPH_MIN_TEMP 0x04000ul

◆ SILENTSTEP3_DRVCONF_SLPL_MASK

#define SILENTSTEP3_DRVCONF_SLPL_MASK 0x03000ul

◆ SILENTSTEP3_DRVCONF_SLPL_MAX

#define SILENTSTEP3_DRVCONF_SLPL_MAX 0x03000ul

◆ SILENTSTEP3_DRVCONF_SLPL_MED_TEMP

#define SILENTSTEP3_DRVCONF_SLPL_MED_TEMP 0x02000ul

◆ SILENTSTEP3_DRVCONF_SLPL_MIN

#define SILENTSTEP3_DRVCONF_SLPL_MIN 0x00000ul

◆ SILENTSTEP3_DRVCONF_SLPL_MIN_TEMP

#define SILENTSTEP3_DRVCONF_SLPL_MIN_TEMP 0x01000ul

◆ SILENTSTEP3_DRVCONF_TS2G_0_8US

#define SILENTSTEP3_DRVCONF_TS2G_0_8US 0x00300ul

◆ SILENTSTEP3_DRVCONF_TS2G_1_2US

#define SILENTSTEP3_DRVCONF_TS2G_1_2US 0x00200ul

◆ SILENTSTEP3_DRVCONF_TS2G_1_6US

#define SILENTSTEP3_DRVCONF_TS2G_1_6US 0x00100ul

◆ SILENTSTEP3_DRVCONF_TS2G_3_2US

#define SILENTSTEP3_DRVCONF_TS2G_3_2US 0x00000ul

◆ SILENTSTEP3_DRVCONF_TS2G_MASK

#define SILENTSTEP3_DRVCONF_TS2G_MASK 0x00300ul

◆ SILENTSTEP3_DRVCONF_TST_MASK

#define SILENTSTEP3_DRVCONF_TST_MASK 0x10000ul

Silent Step 3 DRVCONF register setting.

Specified setting for DRVCONF register of Silent Step 3 Click driver.

◆ SILENTSTEP3_DRVCONF_VSENSE_165MV

#define SILENTSTEP3_DRVCONF_VSENSE_165MV 0x00040ul

◆ SILENTSTEP3_DRVCONF_VSENSE_305MV

#define SILENTSTEP3_DRVCONF_VSENSE_305MV 0x00000ul

◆ SILENTSTEP3_DRVCONF_VSENSE_MASK

#define SILENTSTEP3_DRVCONF_VSENSE_MASK 0x00040ul

◆ SILENTSTEP3_DRVCTRL_0_DEDGE_MASK

#define SILENTSTEP3_DRVCTRL_0_DEDGE_MASK 0x00100ul

◆ SILENTSTEP3_DRVCTRL_0_INTPOL_MASK

#define SILENTSTEP3_DRVCTRL_0_INTPOL_MASK 0x00200ul

Silent Step 3 DRVCTRL (SDOFF=0) register setting.

Specified setting for DRVCTRL (SDOFF=0) register of Silent Step 3 Click driver.

◆ SILENTSTEP3_DRVCTRL_0_MRES_1

#define SILENTSTEP3_DRVCTRL_0_MRES_1 0x00008ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_128

#define SILENTSTEP3_DRVCTRL_0_MRES_128 0x00001ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_16

#define SILENTSTEP3_DRVCTRL_0_MRES_16 0x00004ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_2

#define SILENTSTEP3_DRVCTRL_0_MRES_2 0x00007ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_256

#define SILENTSTEP3_DRVCTRL_0_MRES_256 0x00000ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_32

#define SILENTSTEP3_DRVCTRL_0_MRES_32 0x00003ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_4

#define SILENTSTEP3_DRVCTRL_0_MRES_4 0x00006ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_64

#define SILENTSTEP3_DRVCTRL_0_MRES_64 0x00002ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_8

#define SILENTSTEP3_DRVCTRL_0_MRES_8 0x00005ul

◆ SILENTSTEP3_DRVCTRL_0_MRES_MASK

#define SILENTSTEP3_DRVCTRL_0_MRES_MASK 0x0000Ful

◆ SILENTSTEP3_DRVCTRL_1_CA_MASK

#define SILENTSTEP3_DRVCTRL_1_CA_MASK 0x1FE00ul

◆ SILENTSTEP3_DRVCTRL_1_CB_MASK

#define SILENTSTEP3_DRVCTRL_1_CB_MASK 0x000FFul

◆ SILENTSTEP3_DRVCTRL_1_PHA_MASK

#define SILENTSTEP3_DRVCTRL_1_PHA_MASK 0x20000ul

Silent Step 3 DRVCTRL (SDOFF=1) register setting.

Specified setting for DRVCTRL (SDOFF=1) register of Silent Step 3 Click driver.

◆ SILENTSTEP3_DRVCTRL_1_PHB_MASK

#define SILENTSTEP3_DRVCTRL_1_PHB_MASK 0x00100ul

◆ SILENTSTEP3_MODE_1_OVER_128_STEP

#define SILENTSTEP3_MODE_1_OVER_128_STEP 1

◆ SILENTSTEP3_MODE_1_OVER_16_STEP

#define SILENTSTEP3_MODE_1_OVER_16_STEP 4

◆ SILENTSTEP3_MODE_1_OVER_256_STEP

#define SILENTSTEP3_MODE_1_OVER_256_STEP 0

◆ SILENTSTEP3_MODE_1_OVER_32_STEP

#define SILENTSTEP3_MODE_1_OVER_32_STEP 3

◆ SILENTSTEP3_MODE_1_OVER_64_STEP

#define SILENTSTEP3_MODE_1_OVER_64_STEP 2

◆ SILENTSTEP3_MODE_1_OVER_8_STEP

#define SILENTSTEP3_MODE_1_OVER_8_STEP 5

◆ SILENTSTEP3_MODE_FULL_STEP

#define SILENTSTEP3_MODE_FULL_STEP 8

Silent Step 3 step resolution setting.

Specified setting for step resolution of Silent Step 3 Click driver.

◆ SILENTSTEP3_MODE_HALF_STEP

#define SILENTSTEP3_MODE_HALF_STEP 7

◆ SILENTSTEP3_MODE_QUARTER_STEP

#define SILENTSTEP3_MODE_QUARTER_STEP 6

◆ SILENTSTEP3_PIN_STATE_HIGH

#define SILENTSTEP3_PIN_STATE_HIGH 1

◆ SILENTSTEP3_PIN_STATE_LOW

#define SILENTSTEP3_PIN_STATE_LOW 0

Silent Step 3 pin logic state setting.

Specified setting for pin logic state of Silent Step 3 Click driver.

◆ SILENTSTEP3_SET_DATA_SAMPLE_EDGE

#define SILENTSTEP3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note: Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with silentstep3_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ SILENTSTEP3_SET_DATA_SAMPLE_MIDDLE

#define SILENTSTEP3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

◆ SILENTSTEP3_SGCSCONF_CS_2_OF_32

#define SILENTSTEP3_SGCSCONF_CS_2_OF_32 0x00002ul

◆ SILENTSTEP3_SGCSCONF_CS_MASK

#define SILENTSTEP3_SGCSCONF_CS_MASK 0x0001Ful

◆ SILENTSTEP3_SGCSCONF_SFILT_FILTERED

#define SILENTSTEP3_SGCSCONF_SFILT_FILTERED 0x10000ul

◆ SILENTSTEP3_SGCSCONF_SFILT_MASK

#define SILENTSTEP3_SGCSCONF_SFILT_MASK 0x10000ul

◆ SILENTSTEP3_SGCSCONF_SFILT_STANDARD

#define SILENTSTEP3_SGCSCONF_SFILT_STANDARD 0x00000ul

Silent Step 3 SGCSCONF register setting.

Specified setting for SGCSCONF register of Silent Step 3 Click driver.

◆ SILENTSTEP3_SGCSCONF_SGT_0

#define SILENTSTEP3_SGCSCONF_SGT_0 0x00000ul

◆ SILENTSTEP3_SGCSCONF_SGT_MASK

#define SILENTSTEP3_SGCSCONF_SGT_MASK 0x07F00ul

◆ SILENTSTEP3_SMARTEN_SEDN_1

#define SILENTSTEP3_SMARTEN_SEDN_1 0x06000ul

◆ SILENTSTEP3_SMARTEN_SEDN_2

#define SILENTSTEP3_SMARTEN_SEDN_2 0x04000ul

◆ SILENTSTEP3_SMARTEN_SEDN_32

#define SILENTSTEP3_SMARTEN_SEDN_32 0x00000ul

◆ SILENTSTEP3_SMARTEN_SEDN_8

#define SILENTSTEP3_SMARTEN_SEDN_8 0x02000ul

◆ SILENTSTEP3_SMARTEN_SEDN_MASK

#define SILENTSTEP3_SMARTEN_SEDN_MASK 0x06000ul

◆ SILENTSTEP3_SMARTEN_SEIMIN_HALF_CS

#define SILENTSTEP3_SMARTEN_SEIMIN_HALF_CS 0x00000ul

Silent Step 3 SMARTEN register setting.

Specified setting for SMARTEN register of Silent Step 3 Click driver.

◆ SILENTSTEP3_SMARTEN_SEIMIN_MASK

#define SILENTSTEP3_SMARTEN_SEIMIN_MASK 0x08000ul

◆ SILENTSTEP3_SMARTEN_SEIMIN_QUARTER_CS

#define SILENTSTEP3_SMARTEN_SEIMIN_QUARTER_CS 0x08000ul

◆ SILENTSTEP3_SMARTEN_SEMAX_2

#define SILENTSTEP3_SMARTEN_SEMAX_2 0x00200ul

◆ SILENTSTEP3_SMARTEN_SEMAX_MASK

#define SILENTSTEP3_SMARTEN_SEMAX_MASK 0x00F00ul

◆ SILENTSTEP3_SMARTEN_SEMIN_2

#define SILENTSTEP3_SMARTEN_SEMIN_2 0x00002ul

◆ SILENTSTEP3_SMARTEN_SEMIN_MASK

#define SILENTSTEP3_SMARTEN_SEMIN_MASK 0x0000Ful

◆ SILENTSTEP3_SMARTEN_SEUP_1

#define SILENTSTEP3_SMARTEN_SEUP_1 0x00000ul

◆ SILENTSTEP3_SMARTEN_SEUP_2

#define SILENTSTEP3_SMARTEN_SEUP_2 0x00020ul

◆ SILENTSTEP3_SMARTEN_SEUP_4

#define SILENTSTEP3_SMARTEN_SEUP_4 0x00040ul

◆ SILENTSTEP3_SMARTEN_SEUP_8

#define SILENTSTEP3_SMARTEN_SEUP_8 0x00060ul

◆ SILENTSTEP3_SMARTEN_SEUP_MASK

#define SILENTSTEP3_SMARTEN_SEUP_MASK 0x00060ul

◆ SILENTSTEP3_SPEED_FAST

#define SILENTSTEP3_SPEED_FAST 3

◆ SILENTSTEP3_SPEED_MEDIUM

#define SILENTSTEP3_SPEED_MEDIUM 2

◆ SILENTSTEP3_SPEED_SLOW

#define SILENTSTEP3_SPEED_SLOW 1

◆ SILENTSTEP3_SPEED_VERY_FAST

#define SILENTSTEP3_SPEED_VERY_FAST 4

◆ SILENTSTEP3_SPEED_VERY_SLOW

#define SILENTSTEP3_SPEED_VERY_SLOW 0

Silent Step 3 device speed settings.

Specified setting for rotation speed.

Macros