solarenergy2 2.1.0.0
|
Settings for registers of Solar Energy 2 Click driver. More...
Settings for registers of Solar Energy 2 Click driver.
#define SOLARENERGY2_CRT_SRC_SEL_BIT_MASK 0x03 |
#define SOLARENERGY2_DEVICE_ADDRESS 0x77 |
Solar Energy 2 device address setting.
Specified setting for device slave address selection of Solar Energy 2 Click driver.
#define SOLARENERGY2_LUX_METER_BIT_MASK 0x0F |
#define SOLARENERGY2_LUX_METER_BUSY_BIT_MASK 0x10 |
#define SOLARENERGY2_PROTECT_KEY_EEPROM 0xA5 |
#define SOLARENERGY2_PROTECT_KEY_PROTECTED_REG 0x4B |
#define SOLARENERGY2_PROTECT_KEY_SOFT_RESET 0xE2 |
#define SOLARENERGY2_SET_CRT_SRC_SEL_0mA 0x00 |
#define SOLARENERGY2_SET_CRT_SRC_SEL_10mA 0x02 |
#define SOLARENERGY2_SET_CRT_SRC_SEL_15mA 0x03 |
#define SOLARENERGY2_SET_CRT_SRC_SEL_5mA 0x01 |
#define SOLARENERGY2_SET_HRV_CHECK_VLD_CUR 0x40 |
#define SOLARENERGY2_SET_HRV_CHECK_VLD_VTG 0x00 |
#define SOLARENERGY2_SET_HRV_CURRENT_LVL_15uA 0x0E |
#define SOLARENERGY2_SET_HRV_MIN_VTG_GEN 0x01 |
#define SOLARENERGY2_SET_LDO_CFG_ULP_BIT_MASK 0x08 |
#define SOLARENERGY2_SET_LDO_CFG_VSUP_BIT_MASK 0x80 |
#define SOLARENERGY2_SET_LTS_CFG_BATT_PROT_DIS 0x01 |
#define SOLARENERGY2_SET_LTS_CFG_BATT_PROT_EN 0x00 |
#define SOLARENERGY2_SET_LTS_CFG_CONN_LTS_STS 0x04 |
#define SOLARENERGY2_SET_LTS_CFG_NEVER_CHARGE 0x02 |
#define SOLARENERGY2_SET_LTS_CFG_NORMAL_MODE 0x00 |
#define SOLARENERGY2_SET_LTS_CFG_RECHARGEABLE 0x00 |
#define SOLARENERGY2_SET_MPPT_BIT_MASK 0x0F |
#define SOLARENERGY2_SET_MPPT_RATIO_50 0x00 |
#define SOLARENERGY2_SET_MPPT_RATIO_60 0x01 |
#define SOLARENERGY2_SET_MPPT_RATIO_67 0x02 |
#define SOLARENERGY2_SET_MPPT_RATIO_71 0x03 |
#define SOLARENERGY2_SET_MPPT_RATIO_75 0x04 |
#define SOLARENERGY2_SET_MPPT_RATIO_78 0x05 |
#define SOLARENERGY2_SET_MPPT_RATIO_80 0x06 |
#define SOLARENERGY2_SET_MPPT_RATIO_82 0x07 |
#define SOLARENERGY2_SET_MPPT_RATIO_83 0x08 |
#define SOLARENERGY2_SET_MPPT_RATIO_85 0x09 |
#define SOLARENERGY2_SET_MPPT_RATIO_86 0x0A |
#define SOLARENERGY2_SET_MPPT_RATIO_87 0x0B |
#define SOLARENERGY2_SET_MPPT_RATIO_88 0x0C |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_16sec 0x06 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_1sec 0x02 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_256ms 0x00 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_2sec 0x03 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_32sec 0x07 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_4sec 0x04 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_512ms 0x01 |
#define SOLARENERGY2_SET_T_HRV_LOW_PERIOD_8sec 0x05 |
#define SOLARENERGY2_SET_T_HRV_MEAS_128ms 0x03 |
#define SOLARENERGY2_SET_T_HRV_MEAS_16ms 0x00 |
#define SOLARENERGY2_SET_T_HRV_MEAS_1sec 0x06 |
#define SOLARENERGY2_SET_T_HRV_MEAS_256ms 0x04 |
#define SOLARENERGY2_SET_T_HRV_MEAS_2sec 0x07 |
#define SOLARENERGY2_SET_T_HRV_MEAS_32ms 0x01 |
#define SOLARENERGY2_SET_T_HRV_MEAS_512ms 0x05 |
#define SOLARENERGY2_SET_T_HRV_MEAS_64ms 0x02 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_16sec 0x06 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_1sec 0x02 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_256ms 0x00 |
Solar Energy 2 description setting.
Specified setting for description of Solar Energy 2 Click driver.
#define SOLARENERGY2_SET_T_HRV_PERIOD_2sec 0x03 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_32sec 0x07 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_4sec 0x04 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_512ms 0x01 |
#define SOLARENERGY2_SET_T_HRV_PERIOD_8sec 0x05 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_128ms 0x03 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_2ms 0x00 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_2sec 0x05 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_32ms 0x02 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_32sec 0x07 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_512ms 0x04 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_8ms 0x01 |
#define SOLARENERGY2_SET_T_LTS_LOW_PERIOD_8sec 0x06 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_16ms 0x02 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_16sec 0x07 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_1ms 0x00 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_1sec 0x05 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_256ms 0x04 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_4ms 0x01 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_4sec 0x06 |
#define SOLARENERGY2_SET_T_LTS_PERIOD_64ms 0x03 |
#define SOLARENERGY2_SET_T_STS_PERIOD_128ms 0x06 |
#define SOLARENERGY2_SET_T_STS_PERIOD_16ms 0x03 |
#define SOLARENERGY2_SET_T_STS_PERIOD_1ms 0x00 |
#define SOLARENERGY2_SET_T_STS_PERIOD_256ms 0x07 |
#define SOLARENERGY2_SET_T_STS_PERIOD_2ms 0x01 |
#define SOLARENERGY2_SET_T_STS_PERIOD_32ms 0x04 |
#define SOLARENERGY2_SET_T_STS_PERIOD_64ms 0x05 |
#define SOLARENERGY2_SET_T_STS_PERIOD_8ms 0x02 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_1_2V 0x00 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_1_55V 0x01 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_1_65V 0x02 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_1_8V 0x03 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_2_0V 0x04 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_2_2V 0x05 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_2_4V 0x06 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_2_6V 0x07 |
#define SOLARENERGY2_SET_ULP_LDO_CFG_BIT_MASK 0x07 |
#define SOLARENERGY2_SET_VAUX0_CFG_AUTO_FLT 0x02 |
#define SOLARENERGY2_SET_VAUX0_CFG_AUTO_GND 0x03 |
#define SOLARENERGY2_SET_VAUX0_CFG_LDO 0x01 |
#define SOLARENERGY2_SET_VAUX0_CFG_STS 0x00 |
#define SOLARENERGY2_SET_VAUX1_CFG_AUTO_FLT 0x08 |
#define SOLARENERGY2_SET_VAUX1_CFG_AUTO_GND 0x0C |
#define SOLARENERGY2_SET_VAUX1_CFG_LDO 0x04 |
#define SOLARENERGY2_SET_VAUX1_CFG_STS 0x00 |
#define SOLARENERGY2_SET_VAUX2_CFG_AUTO_FLT 0x20 |
#define SOLARENERGY2_SET_VAUX2_CFG_AUTO_GND 0x30 |
#define SOLARENERGY2_SET_VAUX2_CFG_LDO 0x10 |
#define SOLARENERGY2_SET_VAUX2_CFG_STS 0x00 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_1_2V 0x00 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_1_55V 0x10 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_1_65V 0x20 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_1_8V 0x30 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_2_0V 0x40 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_2_2V 0x50 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_2_4V 0x60 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_2_6V 0x70 |
#define SOLARENERGY2_SET_VAUX_LDO_CFG_BIT_MASK 0x70 |
#define SOLARENERGY2_V_BATT_APP_VTG_BIT_MASK 0x3F |